Systematic approach to the synthesis of continuous-time cascaded sigma-delta modulators

Midwest Symposium on Circuits and Systems

Volumn , Issue , 2007, Pages 1364-1367

  Keller, Matthias ^a   Buhmann, Alexander ^a   Ortmanns, Maurits ^a   Manoli, Yiannos ^a  

^a UNIVERSITY OF FREIBURG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER NETWORKS; CONTINUOUS TIME SYSTEMS; DELTA MODULATION; DIGITAL FILTERS; MATHEMATICAL MODELS; RADIO RECEIVERS; SIGNAL TO NOISE RATIO;

CONTINUOUS-TIME; SYNTHESIS OF; SYSTEMATIC APPROACHES;

MODULATORS;

EID: 51449087789     PISSN: 15483746     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSCAS.2007.4488802     Document Type: Conference Paper

References (10)

1. L. J. Breems, R. Rutten and G. Wetzker, A Cascaded Continuous-Time ΣΔ Modulator with 67-dB Dynamic Range in 10-MHz Bandwidth, IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2152-2160, Dec. 2004.
2. A. Morgado et al., Reconfiguration of Cascade ΣΔ Modulators for Multistandard GSM/Bluetooth/UMTS/WLAN Transceivers, in Proc. IEEE Int. Symp. on Circuits and Systems, 2006, pp. 1884-1887.
3. M. Ortmanns, F. Gerfers and Y. Manoli A Case Study on a 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator, IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, no. 8, pp. 1515-1525, Aug. 2005.
4. R. Tortosa, J. M. de la Rosa, F. V. Fernández and A. Rodríguez-Vázquez A New High-Level Synthesis Methodology of Cascaded Continuous-Time ΣΔ Modulators, IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 53, no. 8, pp. 739-743, Aug. 2006.
5. M. Keller, A. Buhmann, M. Ortmanns and Y. Manoli On the Implicit Anti-Aliasing Feature of Continuous-Time Multistage Nosie-Shaping Sigma-Delta Modulators, Proc. IEEE Int. Symp. Circuits Syst. 2007, in press.
6. D. B. Ribner, A Comparison of Modulator Networks for High-Order Oversampled ΣΔ Analog-to-Digital Converters, IEEE Trans. Circuits Syst.*, vol. 38, no. 2, pp. 145-159, Feb. 1991.
7. R. Schreier and G. C. Temes, Understanding Delta-Sigma Data Converters, Piscataway, NJ: IEEE Press, 2005.
8. A. Marques, V. Peluso, M. S. Steyaert and W. M. Sansen, Optimal Parameters for ΔΣ Modulator Topologies, IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 9, pp. 1232-1241, Sep. 1998.
9. R. Schreier, An Empirical Study of High-Order Single-Bit Delta-Sigma Modulators, IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 40, no. 8, pp. 461-466, Aug. 1993.
10. J. G. Kenney and L. R. Carley, Design of Multibit Noise-Shaping Data Converters, Analog Integrated Circuits and Signal Processing, vol. 3, pp. 259-272, 1993.