Compensation of finite gain-bandwidth induced errors in continuous-time sigma-delta modulators

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 51, Issue 6, 2004, Pages 1088-1099

  Ortmanns, Maurits ^a   Gerfers, Friedel ^b   Manoli, Yiannos ^c  

^a Sci worx GmbH   (Germany)

^b NXP SEMICONDUCTORS   (Netherlands)

^c UNIVERSITY OF FREIBURG   (Germany)

Author keywords

Analog digital (A D) conversion; Compensation; Continuous time; Gain bandwidth (GBW); Sigma delta

Indexed keywords

COMPUTER SIMULATION; DELTA SIGMA MODULATION; ERROR COMPENSATION; OPERATIONAL AMPLIFIERS; SPURIOUS SIGNAL NOISE;

CONTINUOUS-TIME SIGMA-DELTA MODULATORS; FINITE GAIN-BANDWIDTH;

MODULATORS;

EID: 3042595686     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2004.829234     Document Type: Article

References (26)

1. R. Gregorian and G. C. Temes, Analog MOS Integrated Circuits for Signal Processing. New York: Wiley, 1995.
2. B. E. Boser and B. A. Wooley, "The design of sigma-delta modulation analog-to-digital converters," IEEE J. Solid-State Circuits, vol. SC-21, pp. 1003-1010, Dec. 1986.
3. V. Peluso, P. Vancorenalnd, A. M. Marques, M. Steyaert, and W. Sansen, "A 900-mV low-power ΔΣ A/D converter with 77-dB dynamic range," IEEE J. Solid-State Circuits, vol. 33, pp. 1887-1897, Dec. 1998.
4. M. Medeiro, B. Perez-Verdu, and A. Rodriguez-Vazquez, Top-Down Design of High-Performance Sigma-Delta Modulators. Norwell, MA: Kluwer, 1999.
5. K. T. Chan and K. W. Martin, "Components for a GaAs delta-sigma modulator oversampled analog-to-digital converter," in Proc. IEEE Int. Symp. Circuits Systems, 1992, pp. 1300-1303.
6. Y. Matsuya and J. Yamada, "1 V power supply, low-power consumption A/D conversion technique with swing-suppression noise shaping," IEEE J. Solid-State Circuits, vol. 29, pp. 1524-1530, Dec. 1994.
7. N. Wongkomet, "A Comparison of continuous-time and discrete-time sigma-delta modulators," Master's thesis, Univ. of California, Berkeley, 1995.
8. F. Gerfers, M. Ortmanns, and Y. Manoli, "A 1.5-V, 12-bit power efficient continuous-time third-order ΣΔ modulator," IEEE J. Solid-State Circuits, vol. 38, pp. 1343-1352, Aug. 2003.
9. M. Ortmanns, F. Gerfers, and Y. Manoli, "Influence of finite integrator gain bandwidth on CT sigma delta modulators," in Proc. IEEE Int. Symp. Circuits Systems, vol. 1, May 2003, pp. 925-928.
10. ____, "Compensation of the influence of finite gain bandwidth on continuous-time ΣΔ modulators," in Proc. IEEE Int. Conf. Electronics, Circuits, Syst. (ICECS'03), Sharjah, U.A.E., 2003.
11. W. Gao, O. Shoaie, and W. M. Snelgrove, "Excess loop delay effects in continuous-time ΔΣ modulators and the compensation solution," in Proc. IEEE Int. Symp. Circuits Systems, vol. 1, June 1997, pp. 65-68.
12. J. A. Cherry and W. M. Snelgrove, "Excess loop delay in continuous-time delta-sigma modulators," IEEE Trans. Circuits Syst. II, vol. 46, pp. 376-389, Apr. 1989.
13. M. Ortmanns, F. Gerfers, L. Samid, and Y. Manoli, "Successful design of cascaded continuous-time ΣΔ modulators," in Proc. IEEE Int. Conf. Electronics, Circuits Systems, vol. 1, Sept. 2001, pp. 321-324.
14. O. Shoaei, "Continuous-time delta-sigma A/D Converters for high speed applications," Ph.D. dissertation, Carleton University, Ottawa, ON, Canada, 1995.
15. E. J. van der Zwan and E. C. Dijkmans, "A 0.2-mW CMOS ΣΔ modulator for speech coding with 80 dB dynamic range," IEEE J. Solid-State Circuits, vol. 31, pp. 1873-1880, Dec. 1996.
16. O. Shoaei and W. M. Snelgrove, "Design and implementation of a tunable 40 MHz-70 MHz Gm-C bandpass ΔΣ modulator," IEEE Trans. Circuits Syst. II, vol. 44, pp. 521-530, July 1997.
17. J. A. Cherry and W. M. Snelgrove, Continuous-Time Delta-Sigma Modulators for High-Speed A/D Conversion. Norwell, MA: Kluwer, 1999.
18. P. Gray and R. Mayer, Analysis and Design of Analog Integrated Circuits. New York: Wiley, 1993.
19. S. Pavan and Y. Tsividis, High Frequency Continuous-Time Filters in Digital CMOS Process. Norwell, MA: Kluwer, 2000.
20. H. Aboushady and M.-M. Louerat, "Systematic approach for discrete-time to continuous-time transformation of ΣΔ modulators," in Proc. IEEE Int. Symp. Circuits Systems, vol. 4, May 2002, pp. 229-233.
21. O. Shoaei and W. M. Snelgrove, "Optimal bandpass continuous-time ΣΔ modulator," in Proc. IEEE Int. Symp. Circuits Systems, vol. 5, May/June 1994, pp. 489-492.
22. A. Marques, V. Peluso, M. S. Steyaert, and W. M. Sansen, "Optimal parameters for ΔΣ modulators topologies," IEEE Trans. Circuits Syst. II, 45, pp. 1232-1241, Sept. 1998.
23. P. Benabes, M. Keramat, and R. Kielbasa, "A methodology for designing continuous-time sigma-delta modulators," in Proc. IEEE Eur. Design Test Conf., Mar. 1997, pp. 46-50.
24. A. Yahia, P. Benabes, and R. Kielbasa, "Bandpass delta-sigma modulators synthesis with high loop delay," in Proc. IEEE Int. Symp. Circuits Systems, vol. 1, May 2001, pp. 344-347.
25. K. Lee and C. G. Sodini, "A topology for higher order interpolative coders," in Proc. IEEE Int. Symp. Circuits Systems, 1987, pp. 459-462.
26. M. Ortmanns, F. Gerfers, and Y. Manoli, "A continuous-time ΣΔ modulator with reduced jitter sensitivity," in Proc. Eur. Solid-State Circuits Conf., 2002, pp. 287-290.