Folded fully depleted Bulk+ technology as a highly w-scaled planar solution

ESSDERC 2008 - Proceedings of the 38th European Solid-State Device Research Conference

Volumn , Issue , 2008, Pages 210-213

  Bidal, G ^a,b   Loubet, N ^a   Fenouillet Beranger, C ^a,c   Denorme, S ^a   Perreau, P ^c   Chanemougame, D ^a   Laviron, C ^c   Leverd, F ^a   Barnola, S ^c   Beneyton, R ^a,b,c   Duluard, C ^a   Chapon, J D ^a   Gouraud, P ^a   Salvetat, T ^a   Grosjean, M ^c   Deloffre, E ^a   Fleury, D ^a   Clement, L ^a,b   Pribat, C ^a   Pantel, R ^a   Monfray, S ^a   Dutartre, D ^a   GGhibaudo, ^a,b   Boeuf, F ^a   Skotnicki, T ^a   more..

^a STMICROELECTRONICS   (France)

^b IMEP LAHC   (France)

^c CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CRYSTAL GROWTH; MOSFET DEVICES; SILICON WAFERS;

FABRICATION METHODS; FULLY DEPLETED; LOW POWERS; PLANAR SOLUTIONS; SELECTIVE EPITAXIES; SURFACE ORIENTATIONS; TRANSISTOR GAINS;

SEMICONDUCTING SILICON COMPOUNDS;

EID: 58049101546     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2008.4681735     Document Type: Conference Paper

References (14)

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14. th European Solid-State Device Research Conference, 2008.