Consideration of temperature and current stress testing on flip chip solder interconnects

Microelectronics Reliability

Volumn 48, Issue 11-12, 2008, Pages 1847-1856

  Yeo, Alfred ^a   Ebersberger, Bernd ^b   Lee, Charles ^c  

^a CHARTERED SEMICONDUCTOR MANUFACTURING LTD   (Singapore)

^b INFINEON TECHNOLOGIES AG   (Germany)

^c INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMS; BRAZING; COPPER; DIES; DISSOLUTION; ELECTROMIGRATION; ELECTRONIC EQUIPMENT TESTING; FLIP CHIP DEVICES; INTERMETALLICS; METAL RECOVERY; METALLIZING; NORMAL DISTRIBUTION; RELIABILITY; STATISTICAL TESTS; SUBSTRATES; SUPERCONDUCTING MATERIALS; TESTING; WEIBULL DISTRIBUTION; WELDING;

AMBIENT TEMPERATURES; CU METALLIZATION; CURRENT FLOW DIRECTIONS; CURRENT LOADS; CURRENT STRESSES; DATA FITTINGS; DATA INTERPRETATIONS; ELECTROMIGRATION RELIABILITIES; ELECTRONS FLOWS; EXPERIMENTAL SET-UP; FAILURE CRITERIONS; FAILURE PROCESSES; FINITE ELEMENT SIMULATIONS; FLIP CHIP SOLDER JOINTS; FLIP CHIP SOLDERS; FLIP CHIPS; GEOMETRICAL LAYOUTS; HIGH TEMPERATURES; INTERMETALLIC COMPOUNDS; JOINT RESISTANCES; JOINT TESTS; KELVIN STRUCTURES; LIFE-TIMES; MEASUREMENT TECHNIQUES; METAL LINES; RESISTANCE DROPS; RESISTANCE INCREASES; RESISTANCE VALUES; SOLDER JOINTS; STANDARD VARIATIONS; STRESS CURRENTS; TEMPERATURE INCREASES; TEST CONDITIONS; UNDER BUMP METALLIZATION;

SOLDERING ALLOYS;

EID: 55649102533     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2008.07.070     Document Type: Article

References (16)

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