Development of novel joint resistance modeling technique for flip chip interconnection systems

Proceedings of the IEEE/CPMT International Electronics Manufacturing Technology (IEMT) Symposium

Volumn , Issue , 2006, Pages 115-119

  Yeo, Alfred ^a   Wong, Foo Lam ^a   Lee, Charles ^a  

^a INFINEON TECHNOLOGIES ASIA PACIFIC PTE LTD   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

ADHESIVE JOINTS; BRAZING; COPPER; COPPER ALLOYS; CRACKS; ELECTRONIC EQUIPMENT MANUFACTURE; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; TECHNOLOGY; THERMOANALYSIS;

ANALYTICAL APPROACHES; CROSS-SECTIONAL AREA; ELECTRONICS MANUFACTURING; FINITE ELEMENT ANALYSIS; FLIP CHIP BALL GRID ARRAY; FLIP CHIP INTERCONNECTIONS; FLIP-CHIP INTERCONNECTS; INTERCONNECT SCHEMES; INTERNATIONAL CONFERENCES; JOINT RESISTANCES; KELVIN STRUCTURES; MODELING METHODOLOGIES; MODELING METHODS; SN-AG SOLDER; SN-AG-CU SOLDER; SOLDER INTERCONNECTS; THERMAL ANALYSIS;

WELDING;

EID: 50249153468     PISSN: 10898190     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEMT.2006.4456442     Document Type: Conference Paper

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