Simulation tool for the prediction of heavy ion cross section of innovative 130-nm SRAMs

IEEE Transactions on Nuclear Science

Volumn 55, Issue 4, 2008, Pages 2036-2041

  Correas, Vincent ^a,b,c   Saigné, Frédéric ^b   Sagnes, Bruno ^b   Boch, Jérôme ^b   Gasiot, Gilles ^a   Giot, Damien ^a   Roche, Philippe ^a  

^a STMICROELECTRONICS   (France)

^b UNIVERSITÉ MONTPELLIER II   (France)

^c Centre National de Larecherche Scientifique   (France)

Author keywords

Cross section; Heavy ion; Innovative SRAM; Prediction of the heavy ion sensitivity code (PHISco); Single event upset (SEU)

Indexed keywords

CMOS INTEGRATED CIRCUITS; FORECASTING; HEAVY IONS; STANDARDS; STATIC RANDOM ACCESS STORAGE; TOOLS;

CROSS SECTION; HEAVY ION; INNOVATIVE SRAM; PREDICTION OF THE HEAVY ION SENSITIVITY CODE (PHISCO); SINGLE-EVENT UPSET (SEU);

IONS;

EID: 53449090455     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2008.2001065     Document Type: Conference Paper

References (15)

1. V. Correas, F. Saigné, B. Sagnes, J. Boch, G. Gasiot, D. Giot, and P. Roche, "Innovation simulations of heavy ion cross-sections in a 130 nm CMOS SRAM," IEEE Trans. Nucl. Sci., vol. 54, no. 6, pt. 1, pp. 2413-2418, Dec. 2007.
2. J.-M. Palau, M.-C. Calvet, P. E. Dodd, F. W. Sexton, and P. Roche, "Contribution of device simulation to SER understanding," in Proc. IEEE 41st Int. Reliability Physics Symp., Dallas, TX, 2003.
3. J.-M. Palau, F. Wrobel, K. Castellani-Coulié, M.-C. Calvet, P. E. Dodd, and F. W. Sexton, "Monte Carlo exploration of neutron-induced SEU-sensitive volumes in SRAMs," IEEE Trans. Nucl. Sci., vol. 49, no. 6, pp. 3075-3081, Dec. 2002.
4. T. Merelle, H. Chabane, J.-M. Palau, K. Castellani-Coulié, F. Wrobel, F. Saigné, B. Sagnes, J. Boch, J. R. Vaille, G. Gasiot, P. Roche, M.-C. Palau, and T. Carrière, "Criterion for SEU occurrence in SRAM deduced from circuit and device simulations in case of neutron-induced SER,"IEEE Trans. Nucl. Sci., vol. 52, no. 4, pp. 1148-1155, Aug. 2005.
5. P. Roche, F. Jacquet, C. Caillat, and J.-P. Schoellkopf, "An alpha immune and ultra low neutron SER high density SRAM," in Proc. IEEE 42nd Annu. Int. Reliability Phys. Symp., Phoenix, AZ, 2004.
6. G. Gasiot, D. Giot, and P. Roche, "Alpha-induced multiple cell upsets in standard and radiation hardened SRAMs manufactured in a 65 nm CMOS technology," IEEE Trans. Nucl. Sci., vol. 53, no. 6, pp. 3479-3486, Dec. 2006.
7. J. F. Ziegler, The Transport of Ions in Matter. Yorktown Heights, NY: IBM Research, 1996.
8. J.-M. Palau, G. Hubert, K. Coulie, B. Sagnes, M.-C. Calvet, and S. Fourtine, "Device simulation study of the SEU sensitivity of SRAMs to internal ion tracks generated by nuclear reactions," IEEE Trans. Nucl. Sci., vol. 48, no. 2, pp. 225-231, Apr. 2001.
9. G. Hubert, J. M. Palau, K. Castellani-Coulie, M. C. Calvet, and S. Fourtine, "Detailed analysis of secondary ions effect for the calculation of neutron-induced SER in SRAMs," IEEE Trans. Nucl. Sci., vol. 48, no. 6, pp. 1953-1959, Dec. 2001.
10. P. Roche, J. M. Palau, G. Bruguier, C. Tavernier, R. Ecoffet, and J. Gasiot, "Determination of key parameters for SEU occurrence using 3D full cell SRAM simulations," IEEE Trans. Nucl. Sci., vol. 46, no. 6, pp. 1354-1362, Dec. 1999.
11. D. Binder, "Analytic SEU rate calculation compared to space data," IEEE Trans. Nucl. Sci., vol. 35, no. 6, pp. 1570-1572, Dec. 1988.
12. ESA, Single event effects test mehod and guidelines, ESA/SCC Basic Specifications no 25100 European Space Agency. Noordwijk, The Netherlands.
13. V. Ferlet-Cavrois, G. Vizkelethy, P. Paillet, A. Torres, J. R. Schwank, M. R. Shaneyfelt, J. Baggio, J. du Port de Pontcharra, and L. Tosti, "Charge enhancement effect in NMOS bulk transistors induced by heavy ion irradiation-Comparison with SOI," IEEE Trans. Nucl. Sci., vol. 51, no. 6, pp. 3255-3262, Dec. 2004.
14. E. L. Petersen, "Parametric and threshold studies of single event sensitivity," IEEE Trans. Nucl. Sci., vol. 54, no. 4, pp. 1392-1405, Aug. 2007.
15. G. Gasiot, D. Giot, and P. Roche, "Alpha-induced multiple cell upsets in standard and radiation hardened SRAMs manufactured in a 65 nm CMOS technology," IEEE Trans. Nucl. Sci., vol. 53, no. 6, pp. 3479-3486, Dec. 2006.