Fine-grain SEU mitigation for FPGAs using partial TMR

IEEE Transactions on Nuclear Science

Volumn 55, Issue 4, 2008, Pages 2274-2280

  Pratt, Brian ^a   Caffrey, Michael ^b   Carroll, James F ^a   Graham, Paul ^b   Morgan, Keith ^b   Wirthlin, Michael ^a  

^a Department of Electrical and Computer Engineering   (United States)

^b LOS ALAMOS NATIONAL LABORATORY   (United States)

Author keywords

Aerospace industry; Fault injection; Fault tolerance; Field programmable gate arrays (FPGAs); Proton accelerator; Radiation effects; Reliability; Single event upset (SEU); Triple modular redundancy (TMR)

Indexed keywords

COMPUTER CONTROL SYSTEMS; ELECTRIC NETWORK ANALYSIS; FAULT TOLERANT COMPUTER SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); RELIABILITY; URANIUM POWDER METALLURGY;

AEROSPACE INDUSTRY; FAULT INJECTION; FAULT TOLERANCE; FIELD PROGRAMMABLE GATE ARRAYS (FPGAS); PROTON ACCELERATOR; RADIATION EFFECTS; SINGLE-EVENT UPSET (SEU); TRIPLE MODULAR REDUNDANCY (TMR);

QUALITY ASSURANCE;

EID: 53349171461     PISSN: 00189499     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNS.2008.2000852     Document Type: Conference Paper

References (11)

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