-
4
-
-
0041633858
-
-
S. Borkar, T. Karnik, S. Narendra, J. Tschanz, A. Keshavarzi, and V. De. Parameter Variations and Impact on Circuits and Microarchitecture. Design Automation Conference (DAC), 21.1, 2003, pp. 338-342.
-
S. Borkar, T. Karnik, S. Narendra, J. Tschanz, A. Keshavarzi, and V. De. Parameter Variations and Impact on Circuits and Microarchitecture. Design Automation Conference (DAC), 21.1, 2003, pp. 338-342.
-
-
-
-
7
-
-
34548257340
-
Understanding the Thermal Implications of MultiCore Architectures
-
P. Chaparro, J. González, G. Magklis, Q. Cai, and A. González. Understanding the Thermal Implications of MultiCore Architectures. IEEE Transactions on Parallel and Distributed Systems (TPDS), 18, 8, 2007, pp. 1055-1065.
-
(2007)
IEEE Transactions on Parallel and Distributed Systems (TPDS)
, vol.18
, Issue.8
, pp. 1055-1065
-
-
Chaparro, P.1
González, J.2
Magklis, G.3
Cai, Q.4
González, A.5
-
12
-
-
36949001469
-
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget
-
C. Isci, A. Buyuktosunoglu, C-Y. Cher, P. Bose, and M. Martonosi. An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. International Symposium on Microarchitecture (MICRO), 2006.
-
(2006)
International Symposium on Microarchitecture (MICRO)
-
-
Isci, C.1
Buyuktosunoglu, A.2
Cher, C.-Y.3
Bose, P.4
Martonosi, M.5
-
13
-
-
28244452976
-
Coordinated, Distributed, Formal Energy Management of CMP Multiprocessors
-
P. Juang, Q. Wu, L-S. Peh, M. Martonosi, and D. W. Clark. Coordinated, Distributed, Formal Energy Management of CMP Multiprocessors. International Symposium on Low Power Electronics and Design (ISLPED), 2005.
-
(2005)
International Symposium on Low Power Electronics and Design (ISLPED)
-
-
Juang, P.1
Wu, Q.2
Peh, L.-S.3
Martonosi, M.4
Clark, D.W.5
-
15
-
-
4644370318
-
Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance
-
R. Kumar, D.M. Tullsen, P. Ranganathan, N.P. Jouppi, and K. I. Farkas. Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance. International Symposium on Computer Architecture (ISCA), 2004.
-
(2004)
International Symposium on Computer Architecture (ISCA)
-
-
Kumar, R.1
Tullsen, D.M.2
Ranganathan, P.3
Jouppi, N.P.4
Farkas, K.I.5
-
17
-
-
46149084689
-
Microarchitecture Parameter Selection To Optimize System Performance Under Process Variation
-
X. Liang and D. Brooks. Microarchitecture Parameter Selection To Optimize System Performance Under Process Variation. International Conference on Computer-Aided Design (ICCAD), 2006, pp. 429-436.
-
(2006)
International Conference on Computer-Aided Design (ICCAD)
, pp. 429-436
-
-
Liang, X.1
Brooks, D.2
-
19
-
-
0035247631
-
Towards an Energy Complexity of Computation
-
A.J. Martin. Towards an Energy Complexity of Computation. Information Processing Letters. 77, 2001, pp. 181-187.
-
(2001)
Information Processing Letters
, vol.77
, pp. 181-187
-
-
Martin, A.J.1
-
20
-
-
34748913622
-
Balancing Power Consumption in Multiprocessor Systems
-
A. Merkel and F. Bellosa. Balancing Power Consumption in Multiprocessor Systems. EuroSys, 2006, pp. 403-413.
-
(2006)
EuroSys
, pp. 403-413
-
-
Merkel, A.1
Bellosa, F.2
-
22
-
-
40349109002
-
Yield-Aware Cache Architectures
-
S. Ozdemir, D. Sinha, G. Memik, J. Adams, and H. Zhou. Yield-Aware Cache Architectures. International Symposium on Microarchitecture (MICRO), 2006.
-
(2006)
International Symposium on Microarchitecture (MICRO)
-
-
Ozdemir, S.1
Sinha, D.2
Memik, G.3
Adams, J.4
Zhou, H.5
-
26
-
-
33644879118
-
-
J. Renau, B. Fraguela, J. Tuck, W. Liu, M. Prvulovic, L. Ceze, S. Sarangi, P. Sack, K. Strauss, and P. Montesinos. SESC Simulator. http://sesc.sourceforge.net, 2005.
-
(2005)
SESC Simulator
-
-
Renau, J.1
Fraguela, B.2
Tuck, J.3
Liu, W.4
Prvulovic, M.5
Ceze, L.6
Sarangi, S.7
Sack, P.8
Strauss, K.9
Montesinos, P.10
-
27
-
-
33847186856
-
Iterative Computer Algorithms with Applications in Engineering
-
Los Alamitos, CA
-
S.M. Sait and H. Youssef. Iterative Computer Algorithms with Applications in Engineering. IEEE Computer Society, Los Alamitos, CA, 1999.
-
(1999)
IEEE Computer Society
-
-
Sait, S.M.1
Youssef, H.2
-
30
-
-
34547457076
-
Ultra Low-Cost Defect Protection for Microprocessor Pipelines
-
S. Shyam, K. Constantinides, S. Phadke, V. Bertacco, and T. Austin. Ultra Low-Cost Defect Protection for Microprocessor Pipelines. International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2006.
-
(2006)
International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS
-
-
Shyam, S.1
Constantinides, K.2
Phadke, S.3
Bertacco, V.4
Austin, T.5
-
31
-
-
0038684860
-
Temperature-Aware Microarchitecture
-
K. Skadron, M.R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan. Temperature-Aware Microarchitecture. International Symposium on Computer Architecture (ISCA), 2003, pp. 2-13.
-
(2003)
International Symposium on Computer Architecture (ISCA)
, pp. 2-13
-
-
Skadron, K.1
Stan, M.R.2
Huang, W.3
Velusamy, S.4
Sankaranarayanan, K.5
Tarjan, D.6
-
35
-
-
53349127226
-
-
D. Tarjan, S. Thoziyoor, and N.P. Jouppi. CACTI 4.0. HP Laboratories Palo Alto Technical Report HPL-2006-86, 2006.
-
D. Tarjan, S. Thoziyoor, and N.P. Jouppi. CACTI 4.0. HP Laboratories Palo Alto Technical Report HPL-2006-86, 2006.
-
-
-
-
36
-
-
34249306904
-
The University of Virginia, Department of Computer Science, Technical Report CS-2003-05
-
Y. Zhang, D. Parikh, K. Sankaranarayanan, K. Skadron, and M. Stan. HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects. The University of Virginia, Department of Computer Science, Technical Report CS-2003-05, 2003.
-
(2003)
-
-
Zhang, Y.1
Parikh, D.2
Sankaranarayanan, K.3
Skadron, K.4
Stan, M.5
|