Dynamic power-performance adaptation of parallel computation on chip multiprocessors

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn 2006, Issue , 2006, Pages 77-87

  Li, Jian ^a   Martínez, José F ^a  

^a Cornell University ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ENERGY CONSERVATION; HEURISTIC METHODS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; MULTIPROGRAMMING; NATURAL FREQUENCIES; PROBLEM SOLVING; VOLTAGE MEASUREMENT;

CHIP MULTIPROCESSORS (CMP); DYNAMIC OPTIMIZATION; PARALLEL APPLICATIONS; THREAD-LEVEL PARALLELISM;

PROGRAM PROCESSORS;

EID: 33748879741     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2006.1598114     Document Type: Conference Paper

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