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Volumn 2006, Issue , 2006, Pages 29-39
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Dynamic thread assignment on heterogeneous multiprocessor architectures
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Author keywords
Chip multiprocessor; Heterogeneous architectures; Simulation
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Indexed keywords
CHIP MULTIPROCESSOR (CMP);
HETEROGENEOUS ARCHITECTURES;
PROCESSOR CORES;
THREAD MIGRATION;
CACHE MEMORY;
COMPUTATIONAL COMPLEXITY;
COMPUTER ARCHITECTURE;
COMPUTER SIMULATION;
INTEGER PROGRAMMING;
MULTIPROCESSING SYSTEMS;
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EID: 34247331460
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/1128022.1128029 Document Type: Conference Paper |
Times cited : (186)
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References (17)
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