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Volumn , Issue , 2008, Pages 14-19

Custom instruction generation with high-level synthesis

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION-SPECIFIC PROCESSORS; AREA REDUCTION; CUSTOM INSTRUCTION; HIGH-LEVEL SYNTHESIS; INSTRUCTION ENCODING; MULTIPLE INPUTS; MULTIPLE OUTPUTS; RESOURCE SHARING; SUB GRAPHS;

EID: 52349095007     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SASP.2008.4570780     Document Type: Conference Paper
Times cited : (7)

References (20)
  • 1
    • 52349092781 scopus 로고    scopus 로고
    • Tensilica Inc
    • Tensilica Inc., "http://www.tensilica.com."
  • 2
    • 52349114732 scopus 로고    scopus 로고
    • MIPS Technologies, Inc
    • MIPS Technologies, Inc., "http://www.mips.com."
  • 3
    • 52349093844 scopus 로고    scopus 로고
    • Altera Corp
    • Altera Corp., "http://www.altera.com."
  • 4
    • 52349092991 scopus 로고    scopus 로고
    • Toshiba Corporation
    • Toshiba Corporation, "http://www.mepcore.com."
  • 5
    • 0042635850 scopus 로고    scopus 로고
    • Automatic application-specific instruction-set extensions under microarchitectural constraints
    • K. Atasu, L. Pozzi, and P. Ienne, "Automatic application-specific instruction-set extensions under microarchitectural constraints," in Proc. the 40th Design Automation Conference (DAC), pp. 256-261.
    • Proc. the 40th Design Automation Conference (DAC) , pp. 256-261
    • Atasu, K.1    Pozzi, L.2    Ienne, P.3
  • 7
    • 27444443319 scopus 로고    scopus 로고
    • Automated custom instruction generation for domain-specific processor acceleration
    • N. T. Clark, H. Zhong, and S. A. Mahlke, "Automated custom instruction generation for domain-specific processor acceleration," IEEE Transactions on Computers, vol. 54, no. 10, pp. 1258-1270.
    • IEEE Transactions on Computers , vol.54 , Issue.10 , pp. 1258-1270
    • Clark, N.T.1    Zhong, H.2    Mahlke, S.A.3
  • 9
    • 4444384247 scopus 로고    scopus 로고
    • Characterizing embedded applications for instruction-set extensible processors
    • P. Yu and T. Mitra, "Characterizing embedded applications for instruction-set extensible processors," in Proc. the 41st Design Automation Conference (DAC), pp. 723-728.
    • Proc. the 41st Design Automation Conference (DAC) , pp. 723-728
    • Yu, P.1    Mitra, T.2
  • 20
    • 52349093843 scopus 로고    scopus 로고
    • XviD, "http://www.xvid.org."


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.