Architecture and compilation for data bandwidth improvement in configurable embedded processors

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 263-270

  Cong, Jason ^a   Han, Guoling ^a   Zhang, Zhiru ^a  

^a Engineering IV   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CORE PROCESSORS; DATA BANDWIDTH IMPROVEMENT; EMBEDDED PROCESSORS; HASH FUNCTION GENERATION ALGORITHMS;

ALGORITHMS; AUTOMATION; BANDWIDTH; COST EFFECTIVENESS; DATA TRANSFER; LOGIC PROGRAMMING; PROBLEM SOLVING; PROGRAM COMPILERS;

PROGRAM PROCESSORS;

EID: 33750587614     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560075     Document Type: Conference Paper

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