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Volumn , Issue , 2008, Pages 209-214

Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards

Author keywords

[No Author keywords available]

Indexed keywords

CODES (STANDARDS); CODES (SYMBOLS); COMPUTER NETWORKS; DATA STORAGE EQUIPMENT; MAPS; SIGNAL ENCODING; THROUGHPUT; TURBO CODES;

EID: 51649122237     PISSN: 10636862     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASAP.2008.4580180     Document Type: Conference Paper
Times cited : (48)

References (18)
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    • Berrou, C.1    Glavieux, A.2    Thitimajshima, P.3
  • 3
    • 34347240940 scopus 로고    scopus 로고
    • SIMD processor-based turbo decoder supporting multiple third-generation wireless standards
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    • M.C. Shin and I.C. Park. SIMD processor-based turbo decoder supporting multiple third-generation wireless standards. IEEE Trans. on VLSI, vol.15:pp.801-810, Jun. 2007.
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    • Shin, M.C.1    Park, I.C.2
  • 4
    • 34047133840 scopus 로고    scopus 로고
    • ASIP-Based multiprocessor SoC design for simple and double binary turbo decoding
    • Mar
    • O. Muller, A. Baghdadi, and M. Jezequel. ASIP-Based multiprocessor SoC design for simple and double binary turbo decoding. In DATE'06, volume 1, pages 1-6, Mar. 2006.
    • (2006) DATE'06 , vol.1 , pp. 1-6
    • Muller, O.1    Baghdadi, A.2    Jezequel, M.3
  • 5
    • 0029234412 scopus 로고
    • A comparison of optimal and sub-optimal MAP decoding algorithm operating in the log domain
    • P. Robertson, E. Villebrun, and P. Hoeher. A comparison of optimal and sub-optimal MAP decoding algorithm operating in the log domain. In IEEE Int. Conf. Commun., pages 1009-1013, 1995.
    • (1995) IEEE Int. Conf. Commun , pp. 1009-1013
    • Robertson, P.1    Villebrun, E.2    Hoeher, P.3
  • 6
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    • A 24Mb/s radix-4 logMAP turbo decoder for 3GPP-HSDPA mobile wireless
    • Feb
    • M. Bickerstaff et al. A 24Mb/s radix-4 logMAP turbo decoder for 3GPP-HSDPA mobile wireless. In IEEE Int. Solid-State Circuit Conf. (ISSCC), Feb. 2003.
    • (2003) IEEE Int. Solid-State Circuit Conf. (ISSCC)
    • Bickerstaff, M.1
  • 11
    • 12444310252 scopus 로고    scopus 로고
    • Interleavers for turbo codes using permutation polynomials over integer rings
    • Jan
    • J. Sun and O.Y. Takeshita. Interleavers for turbo codes using permutation polynomials over integer rings. IEEE Trans. Inform. Theory, vol.51, Jan. 2005.
    • (2005) IEEE Trans. Inform. Theory , vol.51
    • Sun, J.1    Takeshita, O.Y.2
  • 12
    • 4143091633 scopus 로고    scopus 로고
    • Designing good permutations for turbo codes: Towards a single model
    • June
    • C. Berrou et al. Designing good permutations for turbo codes: towards a single model. In IEEE Conf. Commun., volume 1, pages 341-345, June 2004.
    • (2004) IEEE Conf. Commun , vol.1 , pp. 341-345
    • Berrou, C.1
  • 13
    • 34547586379 scopus 로고    scopus 로고
    • Very low-complexity hardware interleaver for turbo decoding
    • Jul
    • Z. Wang and Q. Li. Very low-complexity hardware interleaver for turbo decoding. IEEE Trans. Circuit and Syst., vol.54:pp. 636-640, Jul. 2007.
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    • Wang, Z.1    Li, Q.2
  • 14
    • 9144240002 scopus 로고    scopus 로고
    • A scalable system architecture for high-throughput turbo-decoders
    • M. J. Thul et al. A scalable system architecture for high-throughput turbo-decoders. The Journal of VLSI Signal Processing, pages 63-77, 2005.
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  • 15
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    • A scalable 8.7-nJ/bit 75.6-Mb/s parallel concatenated convolutional (turbo-) codec
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    • Area-efficient high-throughput MAP decoder architectures
    • Aug
    • S-J. Lee, N.R. Shanbhag, and A.C. Singer. Area-efficient high-throughput MAP decoder architectures. IEEE Trans. VLSI Syst., vol.13:pp. 921-933, Aug. 2005.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.