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Volumn 54, Issue 7, 2007, Pages 636-640

Very Low-Complexity Hardware Interleaver for Turbo Decoding

Author keywords

CDMA; interleaver; turbo codes; VLSI architecture

Indexed keywords

CODE DIVISION MULTIPLE ACCESS; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; TURBO CODES; VLSI CIRCUITS;

EID: 34547586379     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2007.895313     Document Type: Article
Times cited : (22)

References (7)
  • 1
    • 0027297425 scopus 로고
    • Near Shannon limit error-correcting coding and decoding: Turbo-codes
    • May
    • C. Berrou, A. Glavieux, and P. Thitimajshima, “Near Shannon limit error-correcting coding and decoding: Turbo-codes,” in Proc. IEEE ICC’93, May 1993, vol. 2, pp. 1064–1070.
    • (1993) Proc. IEEE ICC’93 , vol.2 , pp. 1064-1070
    • Berrou, C.1    Glavieux, A.2    Thitimajshima, P.3
  • 2
    • 0003742532 scopus 로고    scopus 로고
    • Technical Specification Group Radio Access Network; Multiplexing and Channel Coding (FDD)
    • 3GPP TS25.212 v5.1.0, 3rd Generation Partnership Project
    • Technical Specification Group Radio Access Network; Multiplexing and Channel Coding (FDD), 3GPP TS25.212 v5.1.0, 3rd Generation Partnership Project, 2002.
    • (2002)
  • 3
    • 0003493257 scopus 로고    scopus 로고
    • Physical Layer Standard for CDMA2000 Spread Spectrum Systems
    • 3GPP2 C.S0002-C, vl.0, 3rd Generation Partnership Project 2
    • Physical Layer Standard for CDMA2000 Spread Spectrum Systems, 3GPP2 C.S0002-C, vl.0, 3rd Generation Partnership Project 2, 2002.
    • (2002)
  • 4
    • 0033351808 scopus 로고    scopus 로고
    • VLSI implementation issues of turbo decoder design for wireless applications
    • Z. Wang, H. Suzuki, and K. Parhi, “VLSI implementation issues of turbo decoder design for wireless applications,” in Proc. IEEE Workshop Signal Process. Syst. (SiPS), 1999, pp. 503–512.
    • (1999) Proc. IEEE Workshop Signal Process. Syst. (SiPS) , pp. 503-512
    • Wang, Z.1    Suzuki, H.2    Parhi, K.3
  • 5
    • 34547572306 scopus 로고    scopus 로고
    • An efficient hardware interleaver for 3 G turbo decoding
    • Aug.
    • P. Ampadu and K. Kornegay, “An efficient hardware interleaver for 3 G turbo decoding,” Proc. RAWCON'03, pp. 199–201, Aug. 2003.
    • (2003) Proc. RAWCON'03 , pp. 199-201
    • Ampadu, P.1    Kornegay, K.2
  • 6
    • 0038618704 scopus 로고    scopus 로고
    • Processor-based turbo interleaver for multiple thrid-generation wireless standards
    • May
    • M. Shin and I.-C. Park, “Processor-based turbo interleaver for multiple thrid-generation wireless standards,” IEEE Commun. Lett., vol. 7, no. 5, pp. 210–12, May 2003.
    • (2003) IEEE Commun. Lett. , vol.7 , Issue.5 , pp. 210-212
    • Shin, M.1    Park, I.-C.2
  • 7
    • 0035481298 scopus 로고    scopus 로고
    • Approaches to low-power implementations of DSP systems
    • Oct.
    • K. Parhi, “Approaches to low-power implementations of DSP systems,” IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 48, no. 10, pp. 1214–1224, Oct. 2001.
    • (2001) IEEE Trans. Circuits Syst. I, Fundam. Theory Appl. , vol.48 , Issue.10 , pp. 1214-1224
    • Parhi, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.