Impact of threshold voltage fluctuation due to random telegraph noise on scaled-down SRAM

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2008, Pages 541-546

  Tega, Naoki ^a   Miki, Hiroshi ^a   Yamaoka, Masanao ^a   Kume, Hitoshi ^a   Mine, Toshiyuki ^a   Ishida, Takeshi ^a   Mori, Yuki ^a   Yamada, Renichi ^a   Torii, Kazuyoshi ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

TELEGRAPH; THRESHOLD VOLTAGE;

RANDOM TELEGRAPH NOISE; RELIABILITY PHYSICS; THRESHOLD VOLTAGE FLUCTUATION;

STATIC RANDOM ACCESS STORAGE;

EID: 51549096205     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2008.4558943     Document Type: Conference Paper

References (16)

1. M. Agostinelli, J. Hicks, J. Xu, B. Woolery, K, Mistry, K. Zhang, S. Jacobs, J. Jopling, W, Yang, B. Lee, T. Raz, M. Mehalel, P. Kolar, Y.Wang, J. Sandford, D. Pivin, C. Peterson, M.DiBattista, S. Pae, M, Jones, S. Johnson and G. Subramanian, "Erratic Fluctuation of SRAM Cache Vmin at the 90nm Process Technology Node," in Technical Digest of international Electron Devices Meeting, 2005, pp. 671-674.
2. M. E. Weybright, "SRAM Cell Stability: Part 1. SRAM Basics," in Proceedings of International Reliability Physics Symposium, 2007, Tutorial.
3. H. Kurata, K. Otsuga, A. Kotabe, S. Kajiyama, T. Osabe, Y. Sasago, S. Narumi, K. Tokami, S. Kamohara, and O. Tsuchiya, "The impact of Random Telegraph Signals on the Scaling of Multilevel Flash Memories," in 2006 Symposium on VLSI Circuits, pp. 125-126.
4. N. Tega, H. Miki, T. Osabe, A. Kotabe, K. Otsuga, H. Kuráta, S. Kamohara, K. Tokami, Y. Ikeda, and R. Yamada, "Anomalously Large Threshold Voltage Fluctuation by Complex Random Telegraph Signal in Floating Gate Flash Memory" in Technical Digest of International Electron Devices Meeting, pp. 491-494 (2006)
5. 2 by statistical random telegraph noise analysis" in Technical Digest of International Electron Devices Meeting, pp. 483-486 (2006)
6. H. Miki, T. Osabe, N. Tega, A. Kotabe, H. Kurata, K. Tokami, Y. Ikeda, S. Kamohara and R. Yamada, "QUANTITATIVE ANALYSIS OF RANDOM TELEGRAPH SIGNALS AS FLUCTUATIONS OF THRESHOLD VOLTAGES IN SCALED FLASH MEMORY CELLS " in Proceedings of International Reliability Physics Symposium, pp. 29-35 (2007)
7. K. Abe, S. Sugawa, S. Watabe, N. Miyamoto, A. Teramoto, Y. Kamata, K. Shibusawa, M. Toita and T. Ohmi, "Random Telegraph Signal Statistical Analysis using a Very Largescaled Array TEG with 1M MOSFETs" in 2007 Symposium on VLSI Technology, pp. 210-211.
8. M. J. Kirton and M. J. Uren, "Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/f) noise" Advances in Physics, Vol. 38, No. 4, pp. 367-468 (1989)
9. K. Sonoda, K. Ishikawa, T. Eimori and O, Tsuchiya, " Discrete Dopant Effects on Statistical Variation of Random Telegraph Signal Magnitude" Journal of IEEE Transactions on Electron Devices, Vol. 54,No. 8 pp. 1918-1925 (2007)
10. G. Ghibaudo, O. Roux dit Buisson, C. N. Duc, F. Balestra and J. Brini, "Improved Analysis of Low Frequency Noise in Field-Effect MOS transistors" Journal of physca status solidi (a) Vol.124, pp. 571-581 (1991)
11. T. Boutchacha, G. Ghibaudo and B. Belmekki, "STUDY OF LOW FREQUENCY NOISE IN THE 0.18μm SILICON CMOS TRANSISTORS" in Proceedings of IEEE 1999 international Conference on Microelectronic Test Structures Vol. 12 pp. 84-88 (1999)
12. E. Simoen and C. Claeys, "Random Telegraph Signal: a local probe for single point defect studies solid-state devices" Journal of Materials Science and Engineering, B91-92, pp. 136-143 (2002)
13. T.H. Ning, "High-field capture of electrons by Coulomb-attractive centers in silicon dioxide" Journal of Applied Physics, Vol. 47 No. 7, pp. 3203-3208, (1976)
14. U. Tsukamoto, K. Nii, S. Imaoka, U. Oda, S. Ohbayashi, T. Yoshizawa, H. Makino, K. Ishibashi and H. Shinohara, "Worst-Case Analysis to Obtain Stable Read/Write DC Margin of High Density 6T-SRAM-Array with Local Vth Variability" in Proceedings of International Conference on Computer Aided Design, pp. 398-405, (2005)
15. M. Yamaoka, N. Maeda, Y. Shinozaki, Y. Shimazaki, K. Nii, S. Shimada, K. Yanagisawa and T. Kawahara, " Low-Power Embedded SRAM Modules with Expanded Margin for Writing" in Technical Digest of 2005 IEEE International Solid-State Circuits Conference, pp. 480-482, (2005)
16. A. Asenov, G. Slavcheva, A. R. Brown, J. H. Davies and S. Saini, " Increase in the Random Dopant Induced Threshold Fluctuaions and Lowering in Sub-100nm MOSFETs Due to Quantum Effects: A 3-D Density-Gradient Simulation Study" Journal of IEEE Transactions on Electron Devices, Vol. 48, No. 4 pp. 722-729 (2001)