The impact of random telegraph signals on the scaling of multilevel flash memories

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2006, Pages 112-113

  Kurata, H ^a   Otsuga, K ^a   Kotabe, A ^a   Kajiyama, S ^a   Osabe, T ^a   Sasago, Y ^a   Narumi, S ^b   Tokami, K ^b   Kamohara, S ^b   Tsuchiya, O ^b  

^a HITACHI LTD   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

Flash memory and multilevel; RTS

Indexed keywords

RANDOM PROCESSES; TELEGRAPH; THRESHOLD VOLTAGE;

MULTILEVEL FLASH MEMORIES; TELEGRAPH SIGNALS;

FLASH MEMORY;

EID: 37549006492     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. M. J. Kirton et al., Advances in Physics, 38, 4, pp. 367-468, 1989.
2. A. Asenov et al., IEDM 2000, papers, pp. 279-282.
3. T.Tanaka et al., 1990 VLSI Circuits Symposium, pp. 105-106.