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Volumn 52, Issue 9, 2008, Pages 1312-1317

Si-nanowire CMOS inverter logic fabricated using gate-all-around (GAA) devices and top-down approach

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC WIRE; FIELD EFFECT TRANSISTORS; GALLIUM ALLOYS; MONOLITHIC INTEGRATED CIRCUITS; NANOSTRUCTURES; NANOWIRES; OPTICAL DESIGN; SILICON;

EID: 50349092402     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2008.04.017     Document Type: Article
Times cited : (37)

References (24)
  • 8
    • 0033798557 scopus 로고    scopus 로고
    • Wu Y., and Yang P. Chem Mater 12 3 (2000) 605-607
    • (2000) Chem Mater , vol.12 , Issue.3 , pp. 605-607
    • Wu, Y.1    Yang, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.