Predictive technology model for nano-CMOS design exploration

2006 1st International Conference on Nano-Networks and Workshops, Nano-Net

Volumn , Issue , 2006, Pages

  Cao, Yu ^a   Zhao, Wei ^a  

^a Arizona State University   (United States)

Author keywords

Early design exploration; FinFET; Predictive modeling; Process variations; Technology scaling

Indexed keywords

MODELS; MOSFET DEVICES; NONMETALS; SILICON; TECHNOLOGY;

32 NM TECHNOLOGY; CIRCUIT DESIGNS; DOUBLE-GATE DEVICES; EARLY DESIGN EXPLORATION; EFFECTIVE CHANNEL LENGTH; FINFET; INTERNATIONAL CONFERENCES; MOSFET MODELING; NANO-CMOS; NANO-METER REGIMES; NANO-NET; NANO-NETWORKS; NEW GENERATION; PHYSICAL EFFECTS; PHYSICAL MODELLING; PREDICTIVE MODELING; PRIMARY PARAMETERS; PROCESS UNCERTAINTIES; PROCESS VARIATIONS; TECHNOLOGY SCALING;

MODEL STRUCTURES;

EID: 50149084763     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NANONET.2006.346227     Document Type: Conference Paper

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