High performance 50 nm CMOS devices for microprocessor and embedded processor core applications

Technical Digest-International Electron Devices Meeting

Volumn , Issue , 2001, Pages 237-240

  Huang, Shih Fen ^a   Lin, Chih Yung ^c   Huang, Yu Shyang ^c   Schafbauer, Thomas ^b   Eller, Manfred ^b   Cheng, Yao Ching ^c   Cheng, Shui Ming ^c   Sportouch, Sandrine ^a   Jin, Wei ^a   Rovedo, Nivo ^a   Grassmann, Andreas ^b   Huang, Yimin ^c   Brighten, James ^b   Liu, Chuan H ^c   Von Ehrenwall, Birgit ^b   Chen, Norman ^c   Chen, Jia ^a   Park, O Seo ^b   Commons, Martin ^b   Thomas, Alan ^a   Lee, Ming Tsan ^c   Rauch, Steward ^a   Clevenger, Larry ^a   Kaltalioglu, Erdem ^b   Leung, Pak ^c   Chen, Jenkon ^c   Schiml, Thomas ^b   Wann, Clement ^a   more..

^a IBM MICROELECTRONICS   (United States)

^b In fineon Technologies   (United States)

^c UNITED MICROELECTRONICS CORPORATION   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COPPER; DIELECTRIC MATERIALS; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; LEAKAGE CURRENTS; LITHOGRAPHY; MICROPROCESSOR CHIPS; MOSFET DEVICES; OPTIMIZATION; SEMICONDUCTOR QUANTUM WELLS;

COBALT SILICIDE; EMBEDDED PROCESSOR CORE; OXIDE GATE DIELECTRICS; SHORT CHANNEL EFFECT CONTROL;

CMOS INTEGRATED CIRCUITS;

EID: 17544404834     PISSN: 01631918     EISSN: None     Source Type: Journal    
DOI: 10.1109/IEDM.2001.979474     Document Type: Article

References (6)