A 0.13 μm CMOS technology with 193 nm lithography and Cu/low-k for high performance applications

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2000, Pages 563-566

  Young, K K ^a   Wu, S Y ^a   Wu, C C ^a   Wang, C H ^a   Lin, C T ^a   Cheng, J Y ^a   Chiang, M ^a   Chen, S H ^a   Lo, T C ^a   Chen, Y S ^a   Chen, J H ^a   Chen, L J ^a   Hou, S Y ^a   Liaw, J J ^a   Chang, T E ^a   Hou, C S ^a   Shih, J ^a   Jeng, S M ^a   Hsieh, H C ^a   Ku, Y ^a   Yen, T ^a   Tao, H ^a   Chao, L C ^a   Shue, S ^a   Jang, S M ^a   Ong, T C ^a   Yu, C H ^a   Liang, M S ^a   Diaz, C H ^a   Sun, J Y C ^a   more..

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

COPPER; CURRENT DENSITY; DIELECTRIC MATERIALS; ELECTRIC CONNECTORS; ELECTRIC CONTACTS; GATES (TRANSISTOR); LITHOGRAPHY;

GATE OXIDES;

CMOS INTEGRATED CIRCUITS;

EID: 0034454866     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)