Variation tolerant NoC design by means of self-calibrating links

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2008, Pages 1402-1407

  Simone, Medardoni ^a   Lajolo, Marcello ^b   Bertozzi, Davide ^a  

^a UNIVERSITY OF FERRARA   (Italy)

^b NEC LABORATORIES AMERICA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK TOPOLOGY; FLIP FLOP CIRCUITS; INDUSTRIAL ENGINEERING; TESTING;

ADAPTIVE VOLTAGE; DELAY VARIATIONS; NOC ARCHITECTURES; NOC DESIGN; POWER CONSUMPTION; PROCESS VARIATIONS; SELF-CALIBRATING; VOLTAGE SWINGS;

TIME DELAY;

EID: 49749104801     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2008.4484870     Document Type: Conference Paper

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