-
1
-
-
34247100270
-
Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection
-
A. Andrei, P. Eles, Z. Peng, M. Schmitz, B. M. Al-Hashimi, Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection, IEEE Transactions on Very Large Scale Integration Systems, 15(3):262-275, 2007
-
(2007)
IEEE Transactions on Very Large Scale Integration Systems
, vol.15
, Issue.3
, pp. 262-275
-
-
Andrei, A.1
Eles, P.2
Peng, Z.3
Schmitz, M.4
Al-Hashimi, B.M.5
-
2
-
-
49749098009
-
-
http://ffmpeg.mplayerhq.hu/
-
-
-
-
4
-
-
33746400169
-
HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design
-
W. Huang, S. Ghosh, S. Velusamy, K. Sankaranarayanan, K. Skadron, M. Stan, HotSpot: A Compact Thermal Modeling Methodology for Early-Stage VLSI Design, IEEE onVLSI Systems, 14(5):501-513, 2006.
-
(2006)
IEEE onVLSI Systems
, vol.14
, Issue.5
, pp. 501-513
-
-
Huang, W.1
Ghosh, S.2
Velusamy, S.3
Sankaranarayanan, K.4
Skadron, K.5
Stan, M.6
-
5
-
-
22544456242
-
Temperature and supply voltage aware performance and power modeling at micro-architecture level
-
July
-
W. P. Liao, L. He, and K. M. Lepak, "Temperature and supply voltage aware performance and power modeling at micro-architecture level," IEEE TonCAD, V24, no. 7, pp. 1042-1053, July 2005.
-
(2005)
IEEE TonCAD
, vol.24
, Issue.7
, pp. 1042-1053
-
-
Liao, W.P.1
He, L.2
Lepak, K.M.3
-
6
-
-
33748857902
-
-
Y. Li, B. C. Lee, D. Brooks, Z. Hu, K. Skadron, CMP Design Space Exploration Subject to Physical Constraints, HPCA06, pp. 15-26, 2006.
-
(2006)
Space Exploration Subject to Physical Constraints, HPCA06
, pp. 15-26
-
-
Li, Y.1
Lee, B.C.2
Brooks, D.3
Hu, Z.4
Skadron, K.5
Design, C.M.P.6
-
7
-
-
34548138839
-
Thermal vs Energy Optimization for DVFS-enabled Processors in Embedded Systems
-
Y. Liu, H. Yang, R.P. Dick, H. Wang, L. Shang, Thermal vs Energy Optimization for DVFS-enabled Processors in Embedded Systems, Int. Symp. on Quality Electronic Design (ISQED07), pp. 204 - 209, 2007.
-
(2007)
Int. Symp. on Quality Electronic Design (ISQED07)
, pp. 204-209
-
-
Liu, Y.1
Yang, H.2
Dick, R.P.3
Wang, H.4
Shang, L.5
-
8
-
-
0036917242
-
Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Lower Power Microprocessors under Dynamic Workloads
-
S. Martin, K. Flautner, T. Mudge, D. Blaauw, Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Lower Power Microprocessors under Dynamic Workloads, ICCAD, pp. 721-725, 2002.
-
(2002)
ICCAD
, pp. 721-725
-
-
Martin, S.1
Flautner, K.2
Mudge, T.3
Blaauw, D.4
-
10
-
-
27444438269
-
-
K. Sankaranarayanan, S. Velusamy, M.R. Stan, K. Skadron, A Case for Thermal-Aware Floorplanning at the Microarchitectural Level, The Journal of Instruction-Level Parallelism, V7, Oct. 2005, pp. 1-16.
-
K. Sankaranarayanan, S. Velusamy, M.R. Stan, K. Skadron, A Case for Thermal-Aware Floorplanning at the Microarchitectural Level, The Journal of Instruction-Level Parallelism, V7, Oct. 2005, pp. 1-16.
-
-
-
-
12
-
-
33846578163
-
Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip Design
-
Yuan Xie, Wei-Lun Hung, Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip Design, Journal of VLSI Signal Processing, 45(3), pp. 177-189, 2006.
-
(2006)
Journal of VLSI Signal Processing
, vol.45
, Issue.3
, pp. 177-189
-
-
Xie, Y.1
Hung, W.-L.2
-
13
-
-
33846192734
-
Integrated Space-and-Time-Adaptive Chip-Package Thermal Analysis
-
ISAC
-
Y. Yang, Z. Gu, C. Zhu, R. Dick, L. Shang, ISAC: Integrated Space-and-Time-Adaptive Chip-Package Thermal Analysis, IEEE TonCAD, 26(1), pp. 86-99, 2007.
-
(2007)
IEEE TonCAD
, vol.26
, Issue.1
, pp. 86-99
-
-
Yang, Y.1
Gu, Z.2
Zhu, C.3
Dick, R.4
Shang, L.5
|