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Volumn 7, Issue , 2005, Pages

A case for thermal-aware floorplanning at the microarchitectural level

Author keywords

[No Author keywords available]

Indexed keywords


EID: 27444438269     PISSN: None     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (156)

References (24)
  • 3
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    • The effect of technology scaling on microarchitectural structures
    • University of Texas at Austin Computer Sciences, May
    • V. Agarwal, S. W. Keckler, and D. Burger, "The effect of technology scaling on microarchitectural structures," Tech. Rep. TR-00-02, University of Texas at Austin Computer Sciences, May 2001.
    • (2001) Tech. Rep. , vol.TR-00-02
    • Agarwal, V.1    Keckler, S.W.2    Burger, D.3
  • 8
    • 0020746257 scopus 로고
    • Optimal orientations of cells in slicing floorplan designs
    • L. Stockmeyer, "Optimal orientations of cells in slicing floorplan designs," Information and Control, vol. 57, no. 2-3, pp. 91-101, 1983.
    • (1983) Information and Control , vol.57 , Issue.2-3 , pp. 91-101
    • Stockmeyer, L.1
  • 15
    • 27444443809 scopus 로고    scopus 로고
    • Thermal-aware 3d microarchitectural floorplanning
    • Georgia Institute of Technology Center for Experimental Research in Computer Systems
    • M. Ekpanyapong, M. B. Healy, C. S. Ballapuram, S. K. Lim, H. S. Lee, and G. H. Loh, "Thermal-aware 3d microarchitectural floorplanning," Tech. Rep. GIT-CERCS-04-37, Georgia Institute of Technology Center for Experimental Research in Computer Systems, 2004.
    • (2004) Tech. Rep. , vol.GIT-CERCS-04-37
    • Ekpanyapong, M.1    Healy, M.B.2    Ballapuram, C.S.3    Lim, S.K.4    Lee, H.S.5    Loh, G.H.6
  • 16
    • 27444432307 scopus 로고    scopus 로고
    • Microarchitectural floorplanning for thermal management: A technical report
    • University of Virginia Department of Computer Science, May
    • K. Sankaranarayanan, S. Velusamy, and K. Skadron, " Microarchitectural floorplanning for thermal management: A technical report," Tech. Rep. CS-2005-08, University of Virginia Department of Computer Science, May 2005.
    • (2005) Tech. Rep. , vol.CS-2005-08
    • Sankaranarayanan, K.1    Velusamy, S.2    Skadron, K.3
  • 18
    • 0742321357 scopus 로고    scopus 로고
    • Fixed-outline floorplanning: Enabling hierarchical design
    • December
    • S. N. Adya and I. L. Markov, "Fixed-outline floorplanning : Enabling hierarchical design," IEEE Transactions on VLSI, vol. 11, pp. 1120-1135, December 2003.
    • (2003) IEEE Transactions on VLSI , vol.11 , pp. 1120-1135
    • Adya, S.N.1    Markov, I.L.2
  • 19
    • 29144465623 scopus 로고    scopus 로고
    • Standard Performance Evaluation Corporation, "SPEC CPU2000 Benchmarks." http://www.specbench.org/osg/cpu2000.
    • SPEC CPU2000 Benchmarks
  • 20
    • 0002986475 scopus 로고    scopus 로고
    • The SimpleScalar tool set, version 2.0
    • June
    • D. C. Burger and T. M. Austin, "The SimpleScalar tool set, version 2.0," Computer Architecture News, vol. 25, pp. 13-25, June 1997.
    • (1997) Computer Architecture News , vol.25 , pp. 13-25
    • Burger, D.C.1    Austin, T.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.