메뉴 건너뛰기




Volumn , Issue , 2007, Pages 204-209

Thermal vs energy optimization for DVFS-enabled processors in embedded systems

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINT THEORY; ENERGY UTILIZATION; OPTIMIZATION; PROBLEM SOLVING; VOLTAGE CONTROL;

EID: 34548138839     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2007.158     Document Type: Conference Paper
Times cited : (100)

References (25)
  • 1
    • 34548132532 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors
    • "International Technology Roadmap for Semiconductors," 2005, http:// public.itrs.net.
    • (2005)
  • 2
    • 34548129706 scopus 로고    scopus 로고
    • Thermal design power
    • "Thermal design power," http://www.cpuheat.wz.cz/html/ IntelPowerConsumption.htm.
  • 6
    • 27544457181 scopus 로고    scopus 로고
    • Exploiting structural duplication for life-time reliability enhancement
    • June
    • J. Srinivasan, et al, "Exploiting structural duplication for life-time reliability enhancement," in Proc. Int. Symp. Computer Architecture, June 2005, pp. 520-531.
    • (2005) Proc. Int. Symp. Computer Architecture , pp. 520-531
    • Srinivasan, J.1
  • 7
    • 0036917242 scopus 로고    scopus 로고
    • Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads
    • Nov
    • S. M. Martin, et al., "Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads," in Proc. Int. Conf. Computer-Aided Design, Nov. 2002, pp. 721-725.
    • (2002) Proc. Int. Conf. Computer-Aided Design , pp. 721-725
    • Martin, S.M.1
  • 8
    • 4444368993 scopus 로고    scopus 로고
    • Leakage aware dynamic voltage scaling for real-time embedded systems
    • June
    • R. Jejurikar, C. Pereira, and R. Gupta, "Leakage aware dynamic voltage scaling for real-time embedded systems," in Proc. Design Automation Conf., June 2004, pp. 275-280.
    • (2004) Proc. Design Automation Conf , pp. 275-280
    • Jejurikar, R.1    Pereira, C.2    Gupta, R.3
  • 9
    • 15744378341 scopus 로고    scopus 로고
    • Overhead-conscious voltage selection for dynamic and leakage energy reduction of time-constrained systems
    • Jan
    • A. Andrei, et al, "Overhead-conscious voltage selection for dynamic and leakage energy reduction of time-constrained systems," in IEE Proceedings, Jan. 2005, pp. 28-38.
    • (2005) IEE Proceedings , pp. 28-38
    • Andrei, A.1
  • 10
    • 22544456242 scopus 로고    scopus 로고
    • Temperature and supply voltage aware performance and power modeling at microarchitecture level
    • July
    • W. P. Liao, L. He, and K. M. Lepak, "Temperature and supply voltage aware performance and power modeling at microarchitecture level," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 7, pp. 1042-1053, July 2005.
    • (2005) IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems , vol.24 , Issue.7 , pp. 1042-1053
    • Liao, W.P.1    He, L.2    Lepak, K.M.3
  • 12
    • 33646909655 scopus 로고    scopus 로고
    • Thermal-aware task allocation and scheduling for embedded systems
    • mar
    • W.-L. Hung, et al., "Thermal-aware task allocation and scheduling for embedded systems," in Proc. Design, Automation & Test in Europe Conf., mar. 2005.
    • (2005) Proc. Design, Automation & Test in Europe Conf
    • Hung, W.-L.1
  • 13
  • 16
    • 0034453479 scopus 로고    scopus 로고
    • BSIM4 gate leakage model including source-drain partition
    • Dec
    • K. M. Cao, et al., "BSIM4 gate leakage model including source-drain partition," in IEDM Technology Dig., Dec. 2000, pp. 815-818.
    • (2000) IEDM Technology Dig , pp. 815-818
    • Cao, K.M.1
  • 17
    • 34548129707 scopus 로고    scopus 로고
    • ISCAS85 benchmarks suite
    • "ISCAS85 benchmarks suite," http://www.visc.vt.edu/mhsiao/ iscas85. html.
  • 18
    • 34548140244 scopus 로고    scopus 로고
    • System-level leakage power modeling methodology
    • Dept. of Electronics Engg, Tsinghua University, Bachelor's Degree Thesis, July
    • F. Zhang, "System-level leakage power modeling methodology," Dept. of Electronics Engg., Tsinghua University," Bachelor's Degree Thesis, July 2006.
    • (2006)
    • Zhang, F.1
  • 20
    • 34047131259 scopus 로고    scopus 로고
    • Adaptive chip-package thermal analysis for synthesis and design
    • Mar
    • Y. Yang, et al., "Adaptive chip-package thermal analysis for synthesis and design," in Proc. Design, Automation, and Test in Europe, Mar. 2006, pp. 844-849.
    • (2006) Proc. Design, Automation, and Test in Europe , pp. 844-849
    • Yang, Y.1
  • 21
    • 39749186497 scopus 로고    scopus 로고
    • Combining genetic algorithms based task mapping and optimal voltage selection for energy efficient distributed system synthesis
    • June
    • Y P. Liu, et al., "Combining genetic algorithms based task mapping and optimal voltage selection for energy efficient distributed system synthesis," in Proc. Int. Conf. Communications, Circuits and Systems, June 2006, pp. 2074-2078.
    • (2006) Proc. Int. Conf. Communications, Circuits and Systems , pp. 2074-2078
    • Liu, Y.P.1
  • 23
    • 34548132529 scopus 로고    scopus 로고
    • Intel®pentium™processor extreme edition 955 on 65 nm process
    • datasheet
    • "Intel®pentium™processor extreme edition 955 on 65 nm process," 2006, datasheet.
    • (2006)
  • 24
    • 84886736952 scopus 로고    scopus 로고
    • New generation of predictive technology model for sub-45nm design exploration
    • Mar
    • W. Zhao and Y Cao, "New generation of predictive technology model for sub-45nm design exploration," in Proc. Int. Symp. Quality of Electronic Design, Mar. 2006, pp. 585-590.
    • (2006) Proc. Int. Symp. Quality of Electronic Design , pp. 585-590
    • Zhao, W.1    Cao, Y.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.