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Volumn , Issue , 2006, Pages 288-293

Integrated analysis of communicating tasks in MPSoCs

Author keywords

Memory accesses; Multiprocessor performance analysis; Real time

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; INTERACTIVE COMPUTER SYSTEMS; PARALLEL PROCESSING SYSTEMS; SYSTEMS ANALYSIS;

EID: 34547181873     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1176254.1176325     Document Type: Conference Paper
Times cited : (23)

References (11)
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  • 3
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    • Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems
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    • P. Pop, P. Eles, and Z. Peng. Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems. In 10th International Symposium on Hardware/Software Codesign, Estes Park, Colorado, USA, May 2002.
    • (2002) 10th International Symposium on Hardware/Software Codesign
    • Pop, P.1    Eles, P.2    Peng, Z.3
  • 5
    • 34250791224 scopus 로고    scopus 로고
    • Memory access patterns for the analysis of MPSoCs. In NewCAS2006, Gatineau, Canada
    • S. Schliecker, M. Ivers, and R. Ernst. Memory access patterns for the analysis of MPSoCs. In NewCAS2006, Gatineau, Canada, June 2006. IEEE.
    • June 2006. IEEE
    • Schliecker, S.1    Ivers, M.2    Ernst, R.3
  • 7
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    • L. Sha, R. Rajkumar, and J. P. Lehoczky. Priority inheritance protocols: An approach to real-time synchronization. IEEE Transactions on Computers, 39(9), Sept. 1990.
    • (1990) IEEE Transactions on Computers , vol.39 , Issue.9
    • Sha, L.1    Rajkumar, R.2    Lehoczky, J.P.3
  • 8
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    • Analysis of memory latencies in multi-processor systems
    • Palma de Mallorca, Spain, July
    • J. Staschulat, S. Schliecker, M. Ivers, and R. Ernst. Analysis of memory latencies in multi-processor systems. In WCET Workshop, Palma de Mallorca, Spain, July 2005.
    • (2005) WCET Workshop
    • Staschulat, J.1    Schliecker, S.2    Ivers, M.3    Ernst, R.4
  • 9
    • 85032750964 scopus 로고    scopus 로고
    • Performance analysis of multiprocessor DSPs: A stream-oriented component model
    • May
    • L. Thiele, R Wandeler, and S. Chakraborty. Performance analysis of multiprocessor DSPs: a stream-oriented component model. Signal Processing Magazine, IEEE, 22(3):38-46, May 2005.
    • (2005) Signal Processing Magazine, IEEE , vol.22 , Issue.3 , pp. 38-46
    • Thiele, L.1    Wandeler, R.2    Chakraborty, S.3
  • 10
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    • An extendible approach for analysing fixed priority hard real-time systems
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.