Exploring small-scale and large-scale CMP architectures for commercial Java servers

Proceedings of the 2006 IEEE International Symposium on Workload Characterization, IISWC - 2006

Volumn , Issue , 2006, Pages 191-200

  Iyer, R ^a   Bhat, M ^a   Zhao, L ^a   Illikkal, R ^a   Makineni, S ^a   Jones, M ^a   Shiv, K ^a   Newell, D ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; CACHE MEMORY; COMPUTER PROGRAMMING LANGUAGES; DIES; SERVERS;

CACHE SIMULATIONS; CHIP MULTIPROCESSORS; CMP ARCHITECTURES; JAVA SERVERS; JAVA WORKLOADS; SERVER PLATFORMS;

NANOTECHNOLOGY;

EID: 48449089497     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IISWC.2006.302744     Document Type: Conference Paper

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