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Volumn 25, Issue 3, 2005, Pages 32-45

High-performance throughput computing

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; COMPUTER ARCHITECTURE; COMPUTER SYSTEMS; DATA STORAGE EQUIPMENT; DATABASE SYSTEMS; JAVA PROGRAMMING LANGUAGE; SERVERS;

EID: 22944440036     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2005.49     Document Type: Article
Times cited : (64)

References (11)
  • 1
    • 33444456035 scopus 로고    scopus 로고
    • "MAJC: An Architecture for the New Millennium"
    • Hot Chips 11
    • M. Tremblay, "MAJC: An Architecture for the New Millennium," Hot Chips 11, 1999; http://www.hotchips.org/archives/hc11/3_Tue/ hc99.s8.2.Tremblay.pdf.
    • (1999)
    • Tremblay, M.1
  • 2
    • 0034316177 scopus 로고    scopus 로고
    • "The MAJC Architecture: A Synthesis of Parallelism and Scalability"
    • Nov.-Dec
    • M. Tremblay et al., "The MAJC Architecture: A Synthesis of Parallelism and Scalability," IEEE Micro, vol. 20, no. 6, Nov.-Dec. 2000, pp. 12-25.
    • (2000) IEEE Micro , vol.20 , Issue.6 , pp. 12-25
    • Tremblay, M.1
  • 3
    • 33444476386 scopus 로고    scopus 로고
    • "Gemini: A Power-Efficient Chip Multi-Threaded UltraSPARC Processor"
    • Hot Chips 15
    • S. Kapil, "Gemini: A Power-Efficient Chip Multi-Threaded UltraSPARC Processor," Hot Chips 15, 2003; http://www.hotchips.org/archive/ hc15/pdf/12.sun.pdf.
    • (2003)
    • Kapil, S.1
  • 4
  • 5
    • 33444475475 scopus 로고    scopus 로고
    • "Sun UltraSPARC IV+ Processor"
    • In-Stat
    • D. Greenley, "Sun UltraSPARC IV+ Processor," Microprocessor Forum, In-Stat, 2004.
    • (2004) Microprocessor Forum
    • Greenley, D.1
  • 6
    • 20344374162 scopus 로고    scopus 로고
    • "Niagara: A 32-Way Multithreaded Sparc Processor"
    • Mar.-Apr
    • P. Kongetira, K. Aingaran, and K. Olukotun, "Niagara: A 32-Way Multithreaded Sparc Processor," IEEE Micro, vol. 25, no. 2, Mar.-Apr. 2005, pp. 21-29.
    • (2005) IEEE Micro , vol.25 , Issue.2 , pp. 21-29
    • Kongetira, P.1    Aingaran, K.2    Olukotun, K.3
  • 7
    • 0036298603 scopus 로고    scopus 로고
    • "Power4 System Microarchitecture"
    • Jan
    • J. Tendler et al., "Power4 System Microarchitecture," IBM J. Research and Development, vol. 46, no. 1, Jan. 2002, pp. 5-25.
    • (2002) IBM J. Research and Development , vol.46 , Issue.1 , pp. 5-25
    • Tendler, J.1
  • 8
    • 4444379636 scopus 로고    scopus 로고
    • "Design and Implementation of the Power5 Microprocessor"
    • ACM Press
    • J. Clabes et al., "Design and Implementation of the Power5 Microprocessor," Proc. 41st Ann. Conf. Design Automation (DAC 04), ACM Press, 2004, pp. 670-672.
    • (2004) Proc. 41st Ann. Conf. Design Automation (DAC 04) , pp. 670-672
    • Clabes, J.1
  • 9
    • 0034312339 scopus 로고    scopus 로고
    • "A Performance Methodology for Commercial Servers"
    • Nov
    • S. Kunkel et al., "A Performance Methodology for Commercial Servers," IBM J. Research and Development, vol. 44, no. 6, Nov. 2000, pp. 851-872.
    • (2000) IBM J. Research and Development , vol.44 , Issue.6 , pp. 851-872
    • Kunkel, S.1
  • 10
    • 0034444294 scopus 로고    scopus 로고
    • "Thread Level Parallelism and Interactive Performance of Desktop Applications"
    • Nov
    • K. Flautner et al., "Thread Level Parallelism and Interactive Performance of Desktop Applications," ACM SIGPLAN Notices, vol. 35, no. 11, Nov. 2003, pp. 129-138.
    • (2003) ACM SIGPLAN Notices , vol.35 , Issue.11 , pp. 129-138
    • Flautner, K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.