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Volumn 48, Issue 2, 2008, Pages 274-281

Effects of different drop test conditions on board-level reliability of chip-scale packages

Author keywords

[No Author keywords available]

Indexed keywords

CRACK INITIATION; FATIGUE OF MATERIALS; NUMERICAL METHODS; RELIABILITY; SOLDERED JOINTS; STRESS ANALYSIS;

EID: 44349179334     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2007.03.005     Document Type: Article
Times cited : (46)

References (21)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.