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Volumn , Issue , 2004, Pages 240-254

Combining compiler and runtime IPC predictions to reduce energy in next generation architectures

Author keywords

Adaptive voltage scaling; Compiler architecture interaction; Fetch throttling; Instruction level parallelism; Low power design

Indexed keywords

COMPUTER AIDED INSTRUCTION; COMPUTER ARCHITECTURE; INFORMATION ANALYSIS; OPTIMIZATION; PARALLEL PROCESSING SYSTEMS; REAL TIME SYSTEMS; SPEED CONTROL; VOLTAGE CONTROL;

EID: 4143102641     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/977091.977125     Document Type: Conference Paper
Times cited : (5)

References (35)
  • 1
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  • 11
    • 4143132340 scopus 로고    scopus 로고
    • Cache performance for selected spec cpu2000 benchmarks
    • September
    • J. Cantin and D. Hill. Cache performance for selected spec cpu2000 benchmarks. Computer Architecture News, Vol. 29, No. 4, September 2001.
    • (2001) Computer Architecture News , vol.29 , Issue.4
    • Cantin, J.1    Hill, D.2
  • 17
    • 0009613335 scopus 로고    scopus 로고
    • The microarchitecture of the pentium 4 processor
    • G. Hinton and et al. The microarchitecture of the pentium 4 processor. Intel Technology Journal Q1, 2001.
    • (2001) Intel Technology Journal Q1
    • Hinton, G.1
  • 19
    • 4143071656 scopus 로고    scopus 로고
    • Quantispeed achitecture
    • September
    • A. M. D. Inc. Quantispeed achitecture. AMD White Paper, September 2001.
    • (2001) AMD White Paper
  • 34
    • 4143113711 scopus 로고    scopus 로고
    • Hammer: The architecture of amd's next-generation processors
    • October
    • F. Weber. Hammer: The architecture of amd's next-generation processors. Microprocessor Forum, October 2001.
    • (2001) Microprocessor Forum
    • Weber, F.1
  • 35
    • 0035273395 scopus 로고    scopus 로고
    • Inherently lower-power high-performance superscalar architectures
    • March
    • V. Zyuban and P. Kogge. Inherently lower-power high-performance superscalar architectures. In IEEE Transactions on Computers Vol. 50 No. 3, March 2001.
    • (2001) IEEE Transactions on Computers , vol.50 , Issue.3
    • Zyuban, V.1    Kogge, P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.