Inherently lower-power high-performance superscalar architectures

IEEE Transactions on Computers

Volumn 50, Issue 3, 2001, Pages 268-285

  Zyuban, Victor V ^a,b   Kogge, Peter M ^a,c  

^a IEEE   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

^c University of Notre Dame   (United States)

Author keywords

Energy models; Energy efficient configurations; Low power microarchitecture; Multicluster architecture

Indexed keywords

ENERGY-EFFICIENT CONFIGURATIONS; LOW POWER MICROARCHITECTURE; MULTICLUSTER ARCHITECTURE;

COMPUTER SIMULATION; COMPUTER WORKSTATIONS; MICROPROCESSOR CHIPS; OPTIMIZATION;

COMPUTER ARCHITECTURE;

EID: 0035273395     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.910816     Document Type: Article

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