Reconciling performance and programmability in networking systems

ACM SIGCOMM 2007: Conference on Computer Communications

Volumn , Issue , 2007, Pages 73-84

  Mudigonda, Jayaram ^a   Vin, Harrick M ^a   Keckler, Stephen W ^a  

^a University of Texas at Austin   (United States)

Author keywords

Data cache; Memory bottleneck; Multithreading; Packet processing; Processor architectures; Reconfigurable architectures; Routers

Indexed keywords

COMPUTER HARDWARE; COMPUTER NETWORKS; DATA PROCESSING; PACKET NETWORKS; PROGRAM PROCESSORS; ROUTERS;

MEMORY BOTTLENECK; PACKET PROCESSING; PROCESSOR ARCHITECTURES; SYSTEM CHARACTERISTICS;

COMPUTER SYSTEMS PROGRAMMING;

EID: 36949031021     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1282380.1282390     Document Type: Conference Paper

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