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Volumn , Issue , 2007, Pages 1179-1185

Thermo-mechanical analysis of thru-silicon-via based high density compliant interconnect

Author keywords

[No Author keywords available]

Indexed keywords

FORCE DEFLECTION CURVE; SILICON CHIPS; THERMOMECHANICAL ANALYSIS;

EID: 35348890136     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2007.373943     Document Type: Conference Paper
Times cited : (11)

References (13)
  • 1
    • 0032116366 scopus 로고    scopus 로고
    • Future System-on-Silicon LSI Chips
    • Koyanagi, M. et al, "Future System-on-Silicon LSI Chips," IEEE Micro, Vol. 18, No. 4 (1998), pp. 17-22.
    • (1998) IEEE Micro , vol.18 , Issue.4 , pp. 17-22
    • Koyanagi, M.1
  • 2
    • 24644517630 scopus 로고    scopus 로고
    • Architectural Implications and Process Development of 3-D VLSI Z-Axis Interconnects Using Through Silicon Vias
    • Schaper, L. W. et al, "Architectural Implications and Process Development of 3-D VLSI Z-Axis Interconnects Using Through Silicon Vias," IEEE Trans on Advanced Packaging, Vol. 28, No. 3 (2005), pp. 356-366.
    • (2005) IEEE Trans on Advanced Packaging , vol.28 , Issue.3 , pp. 356-366
    • Schaper, L.W.1
  • 3
    • 0034821485 scopus 로고    scopus 로고
    • Development of Advanced 3D Chip Stacking Technology with Ultra-Fine Interconnection
    • Orlando, FL, May
    • Takahashi, K. et al, "Development of Advanced 3D Chip Stacking Technology with Ultra-Fine Interconnection," Proc 51st Electronic Components and Technology Conf, Orlando, FL, May. 2001, pp. 541-546
    • (2001) Proc 51st Electronic Components and Technology Conf , pp. 541-546
    • Takahashi, K.1
  • 6
    • 33746559781 scopus 로고    scopus 로고
    • Arunasalam, P., Ackler, H. D., and Sammakia, B. G. Microfabrication of Ultra-High Density Wafer-Level Thin Film Compliant Interconnects for Thru-Silicon-Via Based Chip Stacks, J. Vacuum Science and Technology Part B, 24, No. 4 (2006), pp. 1780-1784.
    • Arunasalam, P., Ackler, H. D., and Sammakia, B. G. "Microfabrication of Ultra-High Density Wafer-Level Thin Film Compliant Interconnects for Thru-Silicon-Via Based Chip Stacks," J. Vacuum Science and Technology Part B, Vol.24, No. 4 (2006), pp. 1780-1784.
  • 7
    • 31044437398 scopus 로고    scopus 로고
    • Process Integration for Through-Silicon Vias
    • Spiesshoefer, S. et al., "Process Integration for Through-Silicon Vias," J. Vac. Sci. Technol. A, Vol. 23, No. 4 (2005), pp. 824-829.
    • (2005) J. Vac. Sci. Technol. A , vol.23 , Issue.4 , pp. 824-829
    • Spiesshoefer, S.1
  • 8
    • 31144461233 scopus 로고    scopus 로고
    • 2 Plasma Etching in a Conventional Reactive Ion Etching Tool
    • 2 Plasma Etching in a Conventional Reactive Ion Etching Tool," J. Vac. Sci. Technol. B, Vol. 23, No. 5 (2005), pp. 2226-2231.
    • (2005) J. Vac. Sci. Technol. B , vol.23 , Issue.5 , pp. 2226-2231
    • Figueroa, R.F.1    el2
  • 12
    • 0034482897 scopus 로고    scopus 로고
    • Flexible micro-spring interconnects for high performance probing
    • Las Vegas, NV, May
    • Heemer, J. M. et al., "Flexible micro-spring interconnects for high performance probing," Proc. 50th Electronic Components and Technology Conf, Las Vegas, NV, May. 2000, pp. 1157-1163.
    • (2000) Proc. 50th Electronic Components and Technology Conf , pp. 1157-1163
    • Heemer, J.M.1
  • 13
    • 35348857188 scopus 로고
    • Edition, American Society for Metals, Ohio, Chap 7
    • Howard, E. B., and Timothy, L. G., Metals Handbook Desk Edition, American Society for Metals, (Ohio, 1995) Chap 7.
    • (1995) Metals Handbook Desk
    • Howard, E.B.1    Timothy, L.G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.