-
1
-
-
24644448785
-
Use of Design Pattern Layout for Automated Metrology Recipe Generation
-
C. Tabery, L. Page "Use of Design Pattern Layout for Automated Metrology Recipe Generation." Proceedings of SPIE: Metrology, Inspection and Process Control for Microlithography, vol. 5752, pp. 1424-1434, (2005).
-
(2005)
Proceedings of SPIE: Metrology, Inspection and Process Control for Microlithography
, vol.5752
, pp. 1424-1434
-
-
Tabery, C.1
Page, L.2
-
2
-
-
24644490593
-
A new matching engine between design layout and SEM image of semiconductor device
-
H. Morokuma, A. Sugiyama, Y. Toyoda, W. Nagatomo, T. Sutani, R. Matsuoka, "A new matching engine between design layout and SEM image of semiconductor device", Proceedings of SPIE: Metrology, Inspection and Process Control for Microlithography, vol.5752, pp. 546-558, (2005).
-
(2005)
Proceedings of SPIE: Metrology, Inspection and Process Control for Microlithography
, vol.5752
, pp. 546-558
-
-
Morokuma, H.1
Sugiyama, A.2
Toyoda, Y.3
Nagatomo, W.4
Sutani, T.5
Matsuoka, R.6
-
3
-
-
33745600785
-
Evaluation of OPC Quality using Automated Edge Placement Error Measurement with CD-SEM
-
C. Tabery, L. Page, H. Morokuma, "Evaluation of OPC Quality using Automated Edge Placement Error Measurement with CD-SEM" Proceedings of SPIE: Metrology, Inspection and Process Control for Microlithography, vol 6152 (2006)
-
(2006)
Proceedings of SPIE: Metrology, Inspection and Process Control for Microlithography
, vol.6152
-
-
Tabery, C.1
Page, L.2
Morokuma, H.3
-
4
-
-
33747051554
-
Auto CD-SEM edge-placement error for OPC and process modeling
-
July
-
C. Tabery "Auto CD-SEM edge-placement error for OPC and process modeling," Solid State Technology, http://www.solid-state.com/, pp. 1-7, July 2006.
-
(2006)
Solid State Technology
, pp. 1-7
-
-
Tabery, C.1
-
7
-
-
33745786068
-
-
G. E. Bailey, et al., Intensive 2D SEM model calibration for 45nm and beyond, Proceedings of SPIE, 6143, pp. 61542W1-10, 2006.
-
G. E. Bailey, et al., "Intensive 2D SEM model calibration for 45nm and beyond, Proceedings of SPIE, vol. 6143, pp. 61542W1-10, 2006.
-
-
-
-
8
-
-
1842579631
-
Fine Pixel CD-SEM for Measurements of Two dimensional Patterns
-
S. Yamaguchi, M. Itoh, T. Ikeda, Y. Miyano, T. Mitsui, "Fine Pixel CD-SEM for Measurements of Two dimensional Patterns", 23rd Annual BACUS Symposium, pp. 607-618, (2003).
-
(2003)
23rd Annual BACUS Symposium
, pp. 607-618
-
-
Yamaguchi, S.1
Itoh, M.2
Ikeda, T.3
Miyano, Y.4
Mitsui, T.5
-
9
-
-
84858921690
-
Two Dimensional image-based model calibration For OPC applications
-
K. N. Taravade, E. Croffie, A. Jost, "Two Dimensional image-based model calibration For OPC applications", LSI Logic website, http://www.lsilogic.com/, pp. 1-6, (2003).
-
(2003)
, pp. 1-6
-
-
Taravade, K.N.1
Croffie, E.2
Jost, A.3
-
10
-
-
1642394965
-
Fuzzy CDs: Show Me the Edges
-
World, February
-
Ford, "Fuzzy CDs: Show Me the Edges", Microlithography World, (February 2004).
-
(2004)
Microlithography
-
-
Ford1
-
11
-
-
33745619115
-
Process Variations and Layout Design in IC Design
-
February
-
J. A. Torres, C. N. Berglund, "Process Variations and Layout Design in IC Design", Wireless Design and Development, http://www. wirelessdesignmag.com/, pp. 16, (February 2006).
-
(2006)
, pp. 16
-
-
Torres, J.A.1
Berglund, C.N.2
-
12
-
-
25144441682
-
Improving Model-Based OPC Performance for the 65nm Node Through Calibration Set Optimization
-
K. Patterson, Y. Trouiller "Improving Model-Based OPC Performance for the 65nm Node Through Calibration Set Optimization", Proceedings of SPIE: Design and Process Integration 5756-29, (2005)
-
(2005)
Proceedings of SPIE: Design and Process Integration
, vol.5756 -29
-
-
Patterson, K.1
Trouiller, Y.2
|