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Volumn 5752, Issue II, 2005, Pages 546-558

A new matching engine between design layout and SEM image of semiconductor device

Author keywords

CD SEM; Design; Image processing; Layout; OPC; Pattern matching; SEM

Indexed keywords

ERROR ANALYSIS; IMAGE PROCESSING; LITHOGRAPHY; MEASUREMENT THEORY; SEMICONDUCTOR DEVICES;

EID: 24644490593     PISSN: 16057422     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.602066     Document Type: Conference Paper
Times cited : (36)

References (4)
  • 2
    • 4344579745 scopus 로고    scopus 로고
    • OPC Accuracy and process window verification methodology for sub-100nm node
    • H. Yang, et al: "OPC Accuracy and Process Window Verification Methodology for sub-100nm Node", Proceedings of SPIE Volume5375, 2004
    • (2004) Proceedings of SPIE , vol.5375
    • Yang, H.1
  • 4
    • 0020898588 scopus 로고
    • A new family of nonlinear edge detectors for noisy images
    • Kasvand, T, A new family of nonlinear edge detectors for noisy images: Proc SPIE, Vol.435, pp. 10-16, 1983.
    • (1983) Proc SPIE , vol.435 , pp. 10-16
    • Kasvand, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.