Auto CD-SEM edge-placement error for OPC and process modeling

Solid State Technology

Volumn 49, Issue 7, 2006, Pages 81-86

  Tabery, Cyrus ^a   Page, Lorena ^b  

^a ADVANCED MICRO DEVICES   (United States)

^b Hitachi High Technologies America   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CALIBRATION FLOW; EDGE-PLACEMENT ERROR (EPE); OPTICAL PROXIMITY CORRECTION (OPC); PROCESS VARIABILITY BANDS (PVBAND);

CALIBRATION; DATA ACQUISITION; ERROR CORRECTION; IMAGE ANALYSIS; PROXIMITY INDICATORS; SCANNING ELECTRON MICROSCOPY;

EDGE DETECTION;

EID: 33747051554     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (6)

1. C. Tabery, L. Page "Use of Design Pattern Layout for Automated Metrology Recipe Generation," Proceedings of SPIE: Metrology, Inspection and Process Control for Microlithography XIX, Vol. 5752, pp. 1424-1434, 2005.
2. H. Morokuma, A. Sugiyama, Y. Toyoda, W. Nagatomo, T. Sutani, R. Matsuoka, "A New Matching Engine Between Design Layout and SEM Image of Semiconductor Device," Proceedings of SPIE: Metrology, Inspection and Process Control for Micro lithography XIX, Vol.5752, pp. 546-558, 2005.
3. J. A. Torres, C. N. Berglund, "Process Variations and Layout Design in IC Design," Wireless Design and Development, http://www.wirelessdesignmag.com/, pp. 16, February 2006.
4. C. Haidinyak, C. Tabery, "Applications Using 2D Contact CDSEM Images," 24th Annual BACUS Symposium, 2004.
5. Y. Granik, "Calibration of compact OPC models using SEM contours," 25th Annual BACUS Symposium, 2005.
6. K.N. Taravade, H. Croffie, A. Jost, "Two Dimensional Image-based Model Calibration for OPC Applications," LSI Logic web site, http://www.lsilogic.com/, pp. 1-6, 2003.