BSIM4 gate leakage model including source-drain partition

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2000, Pages 815-818

  Cao, K M ^a   Lee, W C ^a   Liu, W ^a   Jin, X ^a   Su, P ^a   Fung, S K H ^a   An, J X ^a   Yu, B ^a   Hu, C ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; ELECTRON TUNNELING; GATES (TRANSISTOR); LEAKAGE CURRENTS; MATHEMATICAL MODELS; MOS CAPACITORS; OXIDES;

GATE LEAKAGE MODELS;

MOSFET DEVICES;

EID: 0034453479     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. 1.5nm direct-tunneling gate oxide Si MOSFET's
2. 2 gate dielectrics for MOS ULSI
3. 2 breakdown model for very low voltage lifetime extrapolation
4. Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling
5. Direct tunneling current model for circuit simulation