Front-end policies for improved issue efficiency in SMT processors

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn 12, Issue , 2003, Pages 31-40

  El Moursy, A ^a   Albonesi, D H ^a  

^a University of Rochester   (United States)

Author keywords

Clocks; Costs; Delay; Hardware; Microprocessors; Parallel processing; Surface mount technology; Technological innovation; Timing; Yarn

Indexed keywords

CLOCKS; COMPUTER HARDWARE; COSTS; DIGITAL ARITHMETIC; HARDWARE; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS; PROGRAM PROCESSORS; QUEUEING THEORY; RECONFIGURABLE HARDWARE; SUPERCOMPUTERS; SURFACE MOUNT TECHNOLOGY; YARN;

DELAY; HARDWARE STRUCTURES; PARALLEL PROCESSING; POWER OPTIMIZATION; SIMULTANEOUS MULTI-THREADING; SUPERSCALAR MICRO-PROCESSORS; TECHNOLOGICAL INNOVATION; TIMING;

COMPUTER ARCHITECTURE;

EID: 34547715869     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2003.1183522     Document Type: Conference Paper

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