A circuit level implementation of an adaptive issue queue for power-aware microprocessors

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 2001, Pages 73-78

  Buyuktosunoglu, A ^a   Albonesi, D ^a   Schuster, S ^a   Brooks, D ^a   Bose, P ^a   Cook, P ^a  

^a University of Rochester   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ARRAYS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; RANDOM ACCESS STORAGE; TABLE LOOKUP;

ADAPTIVE ISSUE QUEUE; POWER-AWARE MICROPROCESSORS;

MICROPROCESSOR CHIPS;

EID: 0034998355     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/368122.368807     Document Type: Conference Paper

References (16)