A DLL-based programmable clock multiplier in 0.18-μm CMOS with - 70 dBc reference spur

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 8, 2007, Pages 1642-1648

  Maulik, Prabir C ^a,b   Mercer, Douglas A ^a,b  

^a IEEE   (United States)

^b ANALOG DEVICES INC   (United States)

Author keywords

Autozero; Chopper stabilization; Delay locked loop (DLL); Jitter; Pattern jitter; Phase detector; Phase noise; Phase locked loop (PLL); Reference spur; Sample and hold

Indexed keywords

AUTOZERO; CHOPPER STABILIZATION; PATTERN JITTER; PHASE DETECTORS; REFERENCE SPUR; STATIC PHASE OFFSET;

CMOS INTEGRATED CIRCUITS; PHASE LOCKED LOOPS; PROGRAMMABLE LOGIC CONTROLLERS; TIMING JITTER;

FREQUENCY MULTIPLYING CIRCUITS;

EID: 34547439707     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.900300     Document Type: Conference Paper

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