-
1
-
-
84858108870
-
Technology Roadmap for Semiconductors
-
Online, Available
-
Int. Technology Roadmap for Semiconductors, "ITRS roadmap," (2005). [Online]. Available: http://www.itrs.net/Common/2005ITRS/ Home2005.htm.
-
(2005)
ITRS roadmap
-
-
Int1
-
4
-
-
0242443732
-
A 2-Gbps/pin source synchronous CDMA bus interface with simultaneous multi-chip access and reconfigurable I/O capability
-
J. Kim, Z. Xu, and M. F. Chang, "A 2-Gbps/pin source synchronous CDMA bus interface with simultaneous multi-chip access and reconfigurable I/O capability," in Proc. IEEE Custom Integr. Circuits Conf. (CICC), 2003, pp. 317-320.
-
(2003)
Proc. IEEE Custom Integr. Circuits Conf. (CICC)
, pp. 317-320
-
-
Kim, J.1
Xu, Z.2
Chang, M.F.3
-
5
-
-
0037631099
-
Giga bit/s CDMA interconnect transceiver chip-set with multilevel signal data recovery for re-configurable VLSI system
-
Z. Xu, H. Shin, J. Kim, M. F. Chang, and C. Chien, "Giga bit/s CDMA interconnect transceiver chip-set with multilevel signal data recovery for re-configurable VLSI system," in IEEE Int. Solid-State Circuits Conf. Tech. Dig., 2003, pp. 322-323.
-
(2003)
IEEE Int. Solid-State Circuits Conf. Tech. Dig
, pp. 322-323
-
-
Xu, Z.1
Shin, H.2
Kim, J.3
Chang, M.F.4
Chien, C.5
-
6
-
-
4143114600
-
-
J. Kim, Z. Xu, and M. F. Chang, Re-configurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers, in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), 2003, pp. II-33-36.
-
J. Kim, Z. Xu, and M. F. Chang, "Re-configurable memory bus systems using multi-Gbps/pin CDMA I/O transceivers," in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), 2003, pp. II-33-36.
-
-
-
-
8
-
-
84858085140
-
Hopewell Junction, NY
-
IBM, Online, Available
-
IBM, Hopewell Junction, NY, "IBM CoreConnect bus architecture," (1999). [Online]. Available: http://www-03.ibm.com/chips/products/coreconnect/
-
(1999)
IBM CoreConnect bus architecture
-
-
-
10
-
-
33645011974
-
Low-power network-on-chip for high-performance SoC design
-
Feb
-
K. Lee, S. Lee, and H. Yoo, "Low-power network-on-chip for high-performance SoC design," IEEE Trans. Very Large Scale Integr: Syst., vol. 14, no. 2, pp. 148-160, Feb. 2006.
-
(2006)
IEEE Trans. Very Large Scale Integr: Syst
, vol.14
, Issue.2
, pp. 148-160
-
-
Lee, K.1
Lee, S.2
Yoo, H.3
-
13
-
-
0034856730
-
Concurrency, latency, or system overhead: Which has the largest impact on uniprocessor DRAM-system performance
-
V. Cuppu and B. Jacob, "Concurrency, latency, or system overhead: Which has the largest impact on uniprocessor DRAM-system performance," in Proc. 28th Annu. Int. Symp. Comput. Arch., 2001, pp. 62-71.
-
(2001)
Proc. 28th Annu. Int. Symp. Comput. Arch
, pp. 62-71
-
-
Cuppu, V.1
Jacob, B.2
-
15
-
-
0033221636
-
110-GB simultaneous bidirectional transceiver logic synchronized with a system clock
-
Nov
-
T. Takahashi, T. Muto, Y. Shirai, F. Shirotori, Y. Takada, A. Yamagiwa, A. Nishida, A. Hotta, and T. Kiyuna, "110-GB simultaneous bidirectional transceiver logic synchronized with a system clock," IEEE J. Solid-State Circuits, vol. 34, no. 11, pp. 1526-1532, Nov. 1999.
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, Issue.11
, pp. 1526-1532
-
-
Takahashi, T.1
Muto, T.2
Shirai, Y.3
Shirotori, F.4
Takada, Y.5
Yamagiwa, A.6
Nishida, A.7
Hotta, A.8
Kiyuna, T.9
-
16
-
-
0035335623
-
1.6 Gb/s/pin 4-PAM signaling and circuits for a multidrop bus
-
May
-
J. Zerbe, P. Chau, C. Werner, T. Thrush, H. Liaw, B. Garlepp, and K. Donnelly, "1.6 Gb/s/pin 4-PAM signaling and circuits for a multidrop bus," IEEE J. Solid-State Circuits, vol. 36, no. 5, pp. 752-760, May 2001.
-
(2001)
IEEE J. Solid-State Circuits
, vol.36
, Issue.5
, pp. 752-760
-
-
Zerbe, J.1
Chau, P.2
Werner, C.3
Thrush, T.4
Liaw, H.5
Garlepp, B.6
Donnelly, K.7
-
17
-
-
84858108254
-
-
HyperTransport Consortium, Online, Available
-
HyperTransport Consortium, "Testing HyperTransport backgrounder," (2001). [Online]. Available: http://www.hypertransport.org/ docs/dg/HT_Backgrounder_final_v8.pdf
-
(2001)
Testing HyperTransport backgrounder
-
-
-
18
-
-
34547490433
-
-
ARM, AMBA Specification Rev.2, (1999). [Online], Available: http://www.arm.com/products/solutions/AMBA_Spec.html
-
ARM, "AMBA Specification Rev.2," (1999). [Online], Available: http://www.arm.com/products/solutions/AMBA_Spec.html
-
-
-
-
19
-
-
0141538149
-
Efficient on-chip global interconnects
-
R. Ho, K. Mai, and M. Horowitz, "Efficient on-chip global interconnects," in Proc. Symp. VLSI Circuits, 2003, pp. 271-274.
-
(2003)
Proc. Symp. VLSI Circuits
, pp. 271-274
-
-
Ho, R.1
Mai, K.2
Horowitz, M.3
-
20
-
-
27844556591
-
Near speed-of-light on-chip interconnects using pulsed current-mode signaling
-
A. P. Jose, G. Patounakis, and K. L. Shepard, "Near speed-of-light on-chip interconnects using pulsed current-mode signaling," in Proc. Symp. VLSI Circuits, 2005, pp. 108-111.
-
(2005)
Proc. Symp. VLSI Circuits
, pp. 108-111
-
-
Jose, A.P.1
Patounakis, G.2
Shepard, K.L.3
-
21
-
-
0034848112
-
Route packets, not wires: On-chip interconnection networks
-
W. Dally et al., "Route packets, not wires: On-chip interconnection networks," in Proc. Design Autom. Conf, 2001, pp. 684-689.
-
(2001)
Proc. Design Autom. Conf
, pp. 684-689
-
-
Dally, W.1
-
22
-
-
21644479647
-
Benchmarking of on-chip interconnection networks
-
D. Wiklund, S. Sathe, and D. Liu, "Benchmarking of on-chip interconnection networks," in Proc. Int. Conf. Microelectron., 2004, pp. 621-624.
-
(2004)
Proc. Int. Conf. Microelectron
, pp. 621-624
-
-
Wiklund, D.1
Sathe, S.2
Liu, D.3
-
24
-
-
84858095601
-
Arcadia, CA
-
Myricom Corp, Online, Available
-
Myricom Corp., Arcadia, CA, "Myricomhomepage," (1994). [Online]. Available: http://www.myricom/
-
(1994)
Myricomhomepage
-
-
-
25
-
-
84858105328
-
Marlborough, MA
-
Dolphin Corp, Online, Available
-
Dolphin Corp., Marlborough, MA, "PCI SCI-64 adapter card," (1996). [Online]. Available: http://www.dolphinics.no/dics_pci.sci64.htm
-
(1996)
PCI SCI-64 adapter card
-
-
-
27
-
-
84858105126
-
-
HyperTransport Consortium, Online, Available
-
HyperTransport Consortium, "HyperTransport consortium," (2006). [Online], Available: http://www.hypertransport.org/tech/index.cfm.
-
(2006)
HyperTransport consortium
-
-
|