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Volumn , Issue , 2006, Pages 388-391

Impact of metal wet etch on device characteristics and reliability for dual metal gate/high-k CMOS

Author keywords

Carrier mobility; Dual metal gate CMOS; Gate dielectric reliability; High k; Metal wet etch

Indexed keywords

GATE DIELECTRIC RELIABILITY; METAL WET ETCHING; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); POSITIVE BIAS TEMPERATURE INSTABILITY (PBTI);

EID: 34250733976     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2006.251250     Document Type: Conference Paper
Times cited : (1)

References (12)
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    • (2003) VLSI Tech. Digest , pp. 9-10
    • Hobbs, C.1
  • 5
    • 25644434391 scopus 로고    scopus 로고
    • Integration of Dual Metal Gate CMOS on High-k Dielectrics Utilizing a Metal Wet Etch Process
    • Z. Zhang, et al., "Integration of Dual Metal Gate CMOS on High-k Dielectrics Utilizing a Metal Wet Etch Process", Electrochem. Solid State Lett., vol. 8, pp. G271-274, 2005.
    • (2005) Electrochem. Solid State Lett , vol.8
    • Zhang, Z.1
  • 6
    • 15544366887 scopus 로고    scopus 로고
    • Mobility improvement after HCl post-deposition cleaning of high-k dielectric: A potential issue in wet etching of dual metal gate Process technology
    • M.S. Akbar, N. Moumen, J. Barnett, B.H. Lee, and J.C. Lee, "Mobility improvement after HCl post-deposition cleaning of high-k dielectric: a potential issue in wet etching of dual metal gate Process technology", IEEE Elec. Dev. Lett., vol. 26, pp. 163-165, 2005.
    • (2005) IEEE Elec. Dev. Lett , vol.26 , pp. 163-165
    • Akbar, M.S.1    Moumen, N.2    Barnett, J.3    Lee, B.H.4    Lee, J.C.5
  • 7
    • 33746489728 scopus 로고    scopus 로고
    • Mobility enhancement of high-k gate stacks through reduced transient charging
    • P.D. Kirsch, et al., "Mobility enhancement of high-k gate stacks through reduced transient charging", in Proc. EESDERC, 2005, pp. 367-370.
    • (2005) Proc. EESDERC , pp. 367-370
    • Kirsch, P.D.1
  • 8
  • 11
    • 0001716170 scopus 로고    scopus 로고
    • Charge trapping in very thin high-permitttivity gate dielectric layers
    • M. Houssa, A. Stesmans, M. Naili, and M.M. Heyns, "Charge trapping in very thin high-permitttivity gate dielectric layers", Appl. Phys. Lett., vol. 77, pp. 1381-1383, 2000.
    • (2000) Appl. Phys. Lett , vol.77 , pp. 1381-1383
    • Houssa, M.1    Stesmans, A.2    Naili, M.3    Heyns, M.M.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.