InP DHBT technology development for high bitrate mixed-signal IC fabrication

Conference Proceedings - International Conference on Indium Phosphide and Related Materials

Volumn 2006, Issue , 2006, Pages 258-261

  Godin, J ^a   Riet, M ^a   Berdaguer, P ^a   Nodjiadjim, V ^a   Konczykowska, A ^a   Scavennec, A ^a  

^a ALCATEL THALES III V LAB   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; TECHNOLOGICAL FORECASTING;

HIGH BITRATE MIXED-SIGNAL IC FABRICATION;

SEMICONDUCTING INDIUM COMPOUNDS;

EID: 33847144470     PISSN: 10928669     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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10. th GAAS Symposium, pp. 133-136, Paris, Oct. 2005
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