MSI InP/InGaAs DHBT technology: Beyond 40 Gbit/s circuits

Conference Proceedings-International Conference on Indium Phosphide and Related Materials

Volumn , Issue , 2002, Pages 51-54

  Blayac, S ^a   Riet, M ^a,b   Benchimol, J L ^a   Alexandre, F ^a   Berdaguer, P ^a   Kahn, M ^a   Pinquier, A ^a   Dutisseuil, E ^a   Moulu, J ^a   Kasbari, A ^a   Konczykowska, A ^a   Godin, J ^a  

^a NOKIA RESEARCH CENTER   (United States)

^b FT R and I   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; DEMULTIPLEXING; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MULTIPLEXING; OPTICAL COMMUNICATION; OPTICAL FIBERS; SEMICONDUCTING INDIUM GALLIUM ARSENIDE; SEMICONDUCTING INDIUM PHOSPHIDE; SEMICONDUCTOR DEVICE MANUFACTURE;

DOUBLE HETEROJUNCTION BIPOLAR TRANSISTORS (DHBT); OPTICAL FIBER COMMUNICATIONS;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 0036051198     PISSN: 10928669     EISSN: None     Source Type: Journal    
DOI: 10.1109/ICIPRM.2002.1014099     Document Type: Article

References (9)

1. Future photonic networks and the role of InP-based devices
2. A low power 72.8-GHz static frequency divider in AlInAs/InGaAs HBT technology
3. Lateral design of InP/InGaAs DHBTs for 40 Gbit/s ICs
4. Modeling the base-collector heterojunction barrier effect at high current density of SiGe HBTs
5. A new effect at high currents in heterostucture bipolar transistors
6. Investigation of high-current effects in staggered lineup InP/GaAsSb/InP heterostructure bipolar transistors: Temperature characterization and comparison to conventional type-I HBTs and DHBTs
7. An accurate, large signal, high frequency model for GaAs HBTs
8. InP DHBT technology and design methodology for over 40 Gb/s optical communication circuits
9. 40 Gb/s master-slave D-type flip-flop in InP DHBT technology