Electroless diffusion barrier process using SAM on low-k dielectrics

Journal of the Electrochemical Society

Volumn 154, Issue 3, 2007, Pages

  Yoshino, M ^a,d   Masuda, T ^a,d   Yokoshima, T ^a   Sasano, J ^a   Shacham Diamand, Y ^a,b   Matsuda, I ^a   Osaka, T ^a,d   Hagiwara, Y ^c   Sato, I ^c  

^a WASEDA UNIVERSITY   (Japan)

^b TEL AVIV UNIVERSITY   (Israel)

^c TOKYO OHKA KOGYO CO LTD   (Japan)

^d ELECTROCHEMICAL SOCIETY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DIFFUSION BARRIER LAYER; ELECTROLESS DIFFUSION BARRIERS;

COPPER; DIELECTRIC FILMS; ELECTRIC INSULATORS; ELECTRIC WIRING; GRAIN SIZE AND SHAPE; ULSI CIRCUITS;

ELECTROLESS PLATING;

EID: 33846965995     PISSN: 00134651     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.2426798     Document Type: Article

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