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Volumn 12, Issue 1, 2007, Pages

Instruction set synthesis with efficient instruction encoding for configurable processors

Author keywords

Application specific instruction set processor (ASIP); Bitwidth economical; Configurable processor; Instruction encoding; ISA customization and specialization

Indexed keywords


EID: 33846950858     PISSN: 10844309     EISSN: 15577309     Source Type: Journal    
DOI: 10.1145/1217088.1217096     Document Type: Article
Times cited : (5)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.