Design methodology and system for a configurable media embedded processor extensible to VLIW architecture

Proceedings-IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2002, Pages 2-7

  Mizuno, Atsushi ^a   Kohno, Kazuyoshi ^a   Ohyama, Ryuichiro ^a   Tokuyoshi, Takahiro ^a   Uetani, Hironori ^a   Eichel, Hans ^b   Miyamori, Takashi ^a   Matsumoto, Nobu ^a   Matsui, Masataka ^a  

^a TOSHIBA CORPORATION   (Japan)

^b Toshiba Electronics Europe   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER SIMULATION; MULTIMEDIA SYSTEMS; PATTERN RECOGNITION; PROGRAM COMPILERS; SYSTEMS ANALYSIS; VERY LONG INSTRUCTION WORD ARCHITECTURE;

IMAGE RECOGNITION; MEDIA EMBEDDED PROCESSOR INTEGRATOR; REGISTER TRANSFER LEVEL;

EMBEDDED SYSTEMS;

EID: 0036397208     PISSN: 10636404     EISSN: None     Source Type: Journal    
DOI: 10.1109/ICCD.2002.1106738     Document Type: Article

References (7)

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4. K. Kohno, et al., "A New Verification Methodology for Complex Pipeline Behavior", DAC 2001, 48.2
5. http://www.ace.nl/products/cosytech.htm
6. H. Tomiyama, et al., "Compiler Generator for Hardware/Software Codesign", Proc. of 2nd Asia Pacific Conference on Hardware Description Languages (APCHDL'94), pp. 267-270, Oct. 1994.
7. S. Ishiwata, et al., "A Single-Chip MPEG-2 Codec Based on Customizable Media Microprocessor", Proc. CICC 2002, pp.163-166, May, 2002.