Tolerating dependences between large speculative threads via sub-threads

Proceedings - International Symposium on Computer Architecture

Volumn 2006, Issue , 2006, Pages 216-226

  Colohan, Christopher B ^c,e   Ailamaki, Anastassia ^a   Steffan, J Gregory ^b   Mowry, Todd C ^a,d  

^a Carnegie Mellon University ^*  (United States)

^b UNIVERSITY OF TORONTO   (Canada)

^c GOOGLE INC   (United States)

^d INTEL CORPORATION   (United States)

^e CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC INSTRUCTIONS; PARALLELISM; SCIENTIFIC WORKLOADS; THREAD LEVEL SPECULATION (TLS);

COMPUTER HARDWARE; COST EFFECTIVENESS; DATA REDUCTION; MICROPROCESSOR CHIPS; PROBLEM SOLVING;

COMPUTER ARCHITECTURE;

EID: 33845908453     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2006.43     Document Type: Conference Paper

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