Total power-optimal pipelining and parallel processing under process variations in nanometer technology

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2005, Issue , 2005, Pages 535-540

  Kim, Nam Sung ^a   Kgil, Taeho ^b   Bowman, Keith ^a   De, Vivek ^a   Mudge, Trevor ^b  

^a INTEL CORPORATION   (United States)

^b University of Michigan   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER AIDED DESIGN; ELECTRIC POTENTIAL; ELECTRIC POWER UTILIZATION; LEAKAGE CURRENTS; NANOTECHNOLOGY;

DIGITAL SYSTEMS; INVERTER CHAINS; OPTIMAL COMBINATIONS; TIMING INFORMATIONS;

PARALLEL PROCESSING SYSTEMS;

EID: 33751428197     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2005.1560125     Document Type: Conference Paper

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