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Volumn 41, Issue 11, 2006, Pages 2589-2599
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A 1.8-V 256-Mb multilevel cell NOR flash memory with BGO function
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Author keywords
Background operation (BGO); Block redundancy; Channel initiated secondary electron (CHISEL); Dual step pulse (DSP) programming; Local interconnect (LIC); Mirrored current sensing (MCS) read; Multilevel cell (MLC); NOR flash memory
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Indexed keywords
BACKGROUND OPERATION (BGO);
BLOCK REDUNDANCY;
CHANNEL INITIATED SECONDARY ELECTRON (CHISEL);
DUAL-STEP PULSE (DSP) PROGRAMMING;
LOCAL INTERCONNECT (LIC);
MIRRORED CURRENT SENSING (MCS) READ;
MULTILEVEL CELL (MLC);
NOR FLASH MEMORY;
ALGORITHMS;
CMOS INTEGRATED CIRCUITS;
ELECTRIC RESISTANCE;
OPTICAL INTERCONNECTS;
OPTIMIZATION;
RANDOM ACCESS STORAGE;
VOLTAGE CONTROL;
FLASH MEMORY;
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EID: 33750807009
PISSN: 00189200
EISSN: None
Source Type: Journal
DOI: 10.1109/JSSC.2006.883319 Document Type: Conference Paper |
Times cited : (10)
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References (10)
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