The evaluation of mechanical stresses developed in underlying silicon substrates due to electroless nickel under bump metallization using synchrotron X-ray topography

Microelectronics Journal

Volumn 37, Issue 11, 2006, Pages 1372-1378

  Noonan, D ^a   McNally, P J ^b   Chen, W M ^c   Lankinen, A ^d   Knuuttila, L ^d   Tuomi, T O ^d   Danilewsky, A N ^e   Simon, R ^f  

^a DUBLIN CITY UNIVERSITY   (Ireland)

^b Research Institute for Networks and Communications Engineering (RINCE)   (Ireland)

^c UNIVERSITY COLLEGE CORK   (Ireland)

^d AALTO UNIVERSITY   (Finland)

^e UNIVERSITY OF FREIBURG   (Germany)

^f KARLSRUHE INSTITUTE OF TECHNOLOGY   (Germany)

Author keywords

Electroless Ni(P) deposition; Electronic packaging; Reliability; Solder bump; Strain; Under bump metallization (UBM); X ray topography

Indexed keywords

ELECTROLESS PLATING; ELECTRONICS PACKAGING; INTEGRATED CIRCUITS; METALLIZING; NICKEL; RELIABILITY; STRESSES; SYNCHROTRONS; X RAY ANALYSIS;

CRYSTALLINE MISORIENTATION; SOLDER BUMPS; UNDER BUMP METALLIZATION; X-RAY TOPOGRAPHY;

SILICON;

EID: 33750613465     PISSN: 00262692     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mejo.2006.06.008     Document Type: Article

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